{"id":14479,"date":"2015-03-18T12:07:03","date_gmt":"2015-03-18T11:07:03","guid":{"rendered":"http:\/\/www.planet3dnow.de\/cms\/?p=14479"},"modified":"2015-03-20T22:39:11","modified_gmt":"2015-03-20T21:39:11","slug":"zen-zeigt-sich-in-compiler-quellcode","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/14479-zen-zeigt-sich-in-compiler-quellcode\/","title":{"rendered":"AMDs Zen-Architektur zeigt sich in Compiler-Quellcode"},"content":{"rendered":"<p>AMDs n\u00e4chs\u00adte CPU-Archi\u00adtek\u00adtur, wel\u00adche die Bull\u00addo\u00adzer\u00adfa\u00admi\u00adlie abl\u00f6\u00adsen wird, zeigt sich erst\u00admals im Quell\u00adcode der GNU-Binu\u00adtils, die f\u00fcr den GCC-Com\u00adpi\u00adler ben\u00f6\u00adtigt werden.<\/p>\n<p>Ein AMD-Mit\u00adar\u00adbei\u00adter stell\u00adte dort nun einen Patch ein, um einen \u201cznver1\u201d-Prozessor zu unter\u00adst\u00fct\u00adzen. <span class=\"caps\">AMD<\/span> k\u00fcrzt sei\u00adne Archi\u00adtek\u00adtur\u00adcode\u00adna\u00admen immer auf zwei Buch\u00adsta\u00adben ab, Bull\u00addo\u00adzer lief z.B. unter \u201c<span class=\"caps\">BD<\/span>\u201d, da Zen aber nur drei Buch\u00adsta\u00adben lang ist, ist der Zusam\u00admen\u00adhang nicht all\u00adzu schwer zu erken\u00adnen. Wei\u00adter erf\u00e4hrt man Details zu den unter\u00adst\u00fctz\u00adten Befehls\u00ads\u00e4t\u00adzen, <span class=\"caps\">AMD<\/span> scheint dabei mehr oder min\u00adder mit Intels Has\u00adwell-Gene\u00adra\u00adti\u00adon gleich\u00adzie\u00adhen zu wol\u00adlen, au\u00dfer <span class=\"caps\">AVX2<\/span> wer\u00adden wei\u00adte\u00adre klei\u00adne Befehls\u00adsatz\u00ader\u00adwei\u00adte\u00adrun\u00adgen unterst\u00fctzt:<\/p>\n<ul>\n<li>CpuADX\/<span class=\"caps\">ADCX<\/span>: Neue Instruk\u00adtio\u00adnen zur Unter\u00adst\u00fct\u00adzung gro\u00ad\u00dfer Integerzahlen<\/li>\n<li><span class=\"caps\">RDRAND<\/span>: Kryp\u00adto\u00adgra\u00adfie: Siche\u00adrer Pseu\u00addo\u00adzu\u00adfalls\u00adzah\u00adlen\u00adge\u00adne\u00adra\u00adtor&nbsp;(<span class=\"caps\">SP<\/span> 800\u2013<span class=\"caps\">90A<\/span>)<\/li>\n<li><span class=\"caps\">RDSEED<\/span>: Non-deter\u00admi\u00adnis\u00adti\u00adscher Zufalls\u00adbit\u00adge\u00adne\u00adra\u00adtor (<span class=\"caps\">SP<\/span> 800\u2013<span class=\"caps\">90B<\/span> <span class=\"amp\">&amp;<\/span> C) (<a href=\"https:\/\/software.intel.com\/en-us\/blogs\/2012\/11\/17\/the-difference-between-rdrand-and-rdseed\" target=\"_blank\">Details<\/a>)<\/li>\n<li><span class=\"caps\">SHA<\/span>: Siche\u00adrer Hash-Algo\u00adrith\u00admus (<a href=\"https:\/\/software.intel.com\/en-us\/articles\/intel-sha-extensions\" target=\"_blank\">Details<\/a>)<\/li>\n<li><span class=\"caps\">XSAVEC<\/span>: Sichern der Pro\u00adces\u00adsor Exten\u00added Sta\u00adtes mit Com\u00adpac\u00adtion (<a href=\"http:\/\/www.felixcloutier.com\/x86\/XSAVEC.html\" target=\"_blank\">Details<\/a>)<\/li>\n<li><span class=\"caps\">XSAVES<\/span>: Sichern des Pro\u00adces\u00adsor Exten\u00added Sta\u00adtes Super\u00advi\u00adsor (<a href=\"http:\/\/www.felixcloutier.com\/x86\/XSAVES.html\" target=\"_blank\">Details<\/a>)<\/li>\n<li><span class=\"caps\">CLFLUSHOPT<\/span>: Erm\u00f6g\u00adlicht effi\u00adzi\u00aden\u00adtes Cache\u00adflus\u00adhing (<a href=\"https:\/\/software.intel.com\/sites\/default\/files\/managed\/0d\/53\/319433-022.pdf\" target=\"_blank\">Details<\/a>)<\/li>\n<\/ul>\n<p>Zus\u00e4tz\u00adlich bringt <span class=\"caps\">AMD<\/span> einen eige\u00adnen, neu\u00aden Befehl namens \u201c<span class=\"caps\">CLZERO<\/span>\u201d:<\/p>\n<blockquote><p>New <span class=\"caps\">CLZERO<\/span> ins\u00adtruc\u00adtion support.<br>\n* clze\u00adro has opcode \u201c<span class=\"caps\">0F<\/span> 01&nbsp;<span class=\"caps\">FC<\/span>\u201d.<br>\n* clze\u00adro gets enab\u00adled with <span class=\"caps\">CPUID<\/span>, 8000_0008, <span class=\"caps\">EBX<\/span>[0] =1.<br>\n* clze\u00adro ins\u00adtruc\u00adtion zero\u2019s out the 64 byte cache line spe\u00adci\u00adfied in rax. Bits 5:0 of rAX are ignored<\/p><\/blockquote>\n<p>Au\u00dfer\u00addem schnei\u00addet <span class=\"caps\">AMD<\/span> wie\u00adder alte Z\u00f6p\u00adfe ab. Strich Bull\u00addo\u00adzer schon die 3DNow!-Instruktionen, geht es nun <span class=\"caps\">XOP<\/span> und Kon\u00adsor\u00adten an den Kra\u00adgen. Nach\u00addem <span class=\"caps\">XOP<\/span> mehr oder min\u00adder Bestand\u00adteil von <span class=\"caps\">AVX2<\/span> gewor\u00adden ist, dort aber sogar 256-Bit-Ope\u00adra\u00adtio\u00adnen m\u00f6g\u00adlich sind, ist es \u00fcber\u00adfl\u00fcs\u00adsig und wird nicht mehr unter\u00adst\u00fctzt. Glei\u00adches gilt f\u00fcr die Trai\u00adling-Bit-Mani\u00adpu\u00adla\u00adti\u00adon-Befeh\u00adle (<span class=\"caps\">TBM<\/span>), die erst mit AMDs Piledri\u00adver ein\u00adge\u00adf\u00fchrt wur\u00adden. Ver\u00admut\u00adlich reicht <span class=\"caps\">AMD<\/span> die Funk\u00adtio\u00adna\u00adli\u00adt\u00e4t des durch Intel ein\u00adge\u00adf\u00fchr\u00adten BMI2-Befehls\u00adsat\u00adzes, den <span class=\"caps\">AMD<\/span> schon ab Excava\u00adtor unter\u00adst\u00fctzt. Die Light-Weight-Pro\u00adfil\u00ading-Befeh\u00adle (<span class=\"caps\">LWP<\/span>) wer\u00adden eben\u00adfalls ein\u00adge\u00adstellt. Wider\u00adspr\u00fcch\u00adlich ist die Unter\u00adst\u00fct\u00adzung der FMA4-Befeh\u00adle. In der Patch\u00ader\u00adkl\u00e4\u00adrung schreibt der Pro\u00adgram\u00admie\u00adrer, dass auch dies gestri\u00adchen wer\u00adden&nbsp;w\u00fcrde:<\/p>\n<blockquote><p>&nbsp;<span class=\"caps\">TBM<\/span>, <span class=\"caps\">FMA4<\/span>, <span class=\"caps\">XOP<\/span>, <span class=\"caps\">LWP<\/span>: ISAs are not supported.<\/p><\/blockquote>\n<p>.. im Patch\u00adcode ist es aber noch enthalten:<\/p>\n<blockquote><p>+ { \u201c<span class=\"caps\">CPU_ZNVER1_FLAGS<\/span>\u201d,<br>\n\u201cCpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|<b>CpuFMA4<\/b>|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO\u201d },<\/p><\/blockquote>\n<p>Wie man sieht, ist der Patch also noch mit hei\u00ad\u00dfer Nadel gestrickt und sicher\u00adlich nicht das letz\u00adte Wort. Fest\u00adzu\u00adstel\u00adlen ist aber, dass <span class=\"caps\">AMD<\/span> an Zens Soft\u00adware\u00adun\u00adter\u00adst\u00fct\u00adzung arbei\u00adtet, die neue Archi\u00adtek\u00adtur also n\u00e4her&nbsp;kommt.<\/p>\n<p>\u00dcber wei\u00adte\u00adre Befehls\u00adsatz\u00adde\u00adtails infor\u00admier\u00adte bereits unser alter Arti\u00adkel: <a href=\"http:\/\/www.planet3dnow.de\/vbulletin\/threads\/362353-AMDs-SSE5-ist-tot-lang-lebe-AVX\">AMDs <span class=\"caps\">SSE5<\/span> ist tot \u2014 lang lebe <span class=\"caps\">AVX<\/span><\/a>.<\/p>\n<p>Dan\u00adke an isig\u00adrim f\u00fcr den Forenbeitrag.<\/p>\n<p>Quel\u00adle: <a href=\"http:\/\/www.phoronix.com\/scan.php?page=news_item&amp;px=AMD-Zen-CPU-Znver1\"><span class=\"caps\">AMD<\/span> Starts Linux Ena\u00adblem\u00adent On Next-Gen \u201cZen\u201d Archi\u00adtec\u00adtu\u00adre \u2014 Pho\u00adro\u00adnix<\/a>.<\/p>\n<p><strong><a href=\"http:\/\/www.planet3dnow.de\/vbulletin\/threads\/421433-AMD-Zen-14nm-8-Kerne-95W-TDP-DDR4?p=4994421&amp;viewfull=1#post4994421\">Dis\u00adkus\u00adsi\u00adon im&nbsp;Forum<\/a><\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"<p>AMDs n\u00e4chs\u00adte CPU-Archi\u00adtek\u00adtur, wel\u00adche die Bull\u00addo\u00adzer\u00adfa\u00admi\u00adlie abl\u00f6\u00adsen wird, zeigt sich erst\u00admals im Quell\u00adcode der GNU-Binu\u00adtils, die f\u00fcr den GCC-Com\u00adpi\u00adler ben\u00f6\u00adtigt wer\u00adden.  (\u2026) <a class=\"moretag\" href=\"https:\/\/www.planet3dnow.de\/cms\/14479-zen-zeigt-sich-in-compiler-quellcode\/\">Wei\u00adter\u00adle\u00adsen&nbsp;\u00bb<\/a><\/p>\n","protected":false},"author":5,"featured_media":80,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[12],"tags":[966,656],"class_list":["post-14479","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-aktuelles","tag-amd","tag-zen","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/14479","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=14479"}],"version-history":[{"count":15,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/14479\/revisions"}],"predecessor-version":[{"id":14550,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/14479\/revisions\/14550"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media\/80"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=14479"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=14479"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=14479"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}