{"id":49182,"date":"2019-08-02T15:51:30","date_gmt":"2019-08-02T13:51:30","guid":{"rendered":"https:\/\/www.planet3dnow.de\/cms\/?p=49182"},"modified":"2019-08-02T15:51:30","modified_gmt":"2019-08-02T13:51:30","slug":"innogrit-debuts-with-four-nvme-ssd-controllers","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/49182-innogrit-debuts-with-four-nvme-ssd-controllers\/","title":{"rendered":"Innogrit Debuts With Four NVMe SSD<\/span> Controllers"},"content":{"rendered":"

A new SSD<\/span> con\u00adtrol\u00adler desi\u00adgner is coming out of ste\u00adalth mode today. Inno\u00adgrit was foun\u00added in 2016 by sto\u00adrage indus\u00adtry veterans with the goal of deve\u00adlo\u00adping sto\u00adrage tech\u00adno\u00adlo\u00adgy to sup\u00adport AI<\/span> and big data appli\u00adca\u00adti\u00adons. We spo\u00adke with co-foun\u00adder Dr. Zining Wu (form\u00ader\u00adly Marvell\u2019s CTO<\/span>) about the company\u2019s plan\u00adned pro\u00adduct lin\u00ade\u00adup, and he will be pre\u00adsen\u00adting more infor\u00adma\u00adti\u00adon next week in a key\u00adnote speech at Flash Memo\u00adry Summit.<\/p>\n

Innogrit\u2019s long term goal is to go after the enter\u00adpri\u00adse sto\u00adrage mar\u00adket, but they are start\u00ading small with a DRAM\u00adless cli\u00adent SSD<\/span> con\u00adtrol\u00adler, the IG5208<\/span> \u201cShas\u00adta\u201d. This is alre\u00ada\u00addy in mass pro\u00adduc\u00adtion with full turn\u00adkey refe\u00adrence SSD<\/span> designs available. It will be fol\u00adlo\u00adwed up incre\u00admen\u00adtal\u00adly lar\u00adger con\u00adtrol\u00adlers with more advan\u00adced fea\u00adture sets: Shas\u00adta+, Rai\u00adnier and Taco\u00adma. With each ite\u00adra\u00adti\u00adon, Inno\u00adgrit is incre\u00adasing per\u00adfor\u00admance, adding more fea\u00adtures and impro\u00adving their LDPC<\/span> error cor\u00adrec\u00adtion engine.<\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Inno\u00adgrit NVMe SSD<\/span> Con\u00adtrol\u00adler Roadmap<\/td>\n<\/tr>\n
Con\u00adtrol\u00adler<\/td>\nShas\u00adta<\/td>\nShas\u00adta+<\/td>\nRai\u00adnier<\/td>\nTaco\u00adma<\/td>\n<\/tr>\n
Model Num\u00adber<\/td>\nIG5208<\/span><\/td>\nIG5216<\/span><\/td>\nIG5236<\/span><\/td>\nIG5668<\/span><\/td>\n<\/tr>\n
Host Inter\u00adface<\/td>\nPCIe 3 x2<\/td>\nPCIe 3 x4<\/td>\nPCIe 4 x4<\/td>\nPCIe 4 x4<\/td>\n<\/tr>\n
Pro\u00adto\u00adcol<\/td>\nNVMe 1.3<\/td>\nNVMe 1.4<\/td>\n<\/tr>\n
NAND<\/span> Chan\u00adnels<\/td>\n4<\/td>\n4<\/td>\n8<\/td>\n16<\/td>\n<\/tr>\n
Max Capa\u00adci\u00adty<\/td>\n2 TB<\/span><\/td>\n2 TB<\/span><\/td>\n16 TB<\/span><\/td>\n32 TB<\/span><\/td>\n<\/tr>\n
DRAM<\/span> Sup\u00adport<\/td>\nNo (HMB<\/span> Supported)<\/td>\nDDR3<\/span>\/4, LPDDR3<\/span>\/4
\n32\/16-bit bus<\/td>\n		DDR3<\/span>\/4, LPDDR3<\/span>\/4,
\n72-bit bus<\/td>\n<\/tr>\n
Manu\u00adfac\u00adtu\u00adring Process<\/td>\n28nm<\/td>\n\u201c16\/12nm\u201d<\/td>\n<\/tr>\n
BGA<\/span> Packa\u00adge Size<\/td>\n10x9mm,
\n7x10mm<\/td>\n		7x11mm,
\n10x10mm<\/td>\n		15x15mm<\/td>\n17x17mm<\/td>\n<\/tr>\n
Sequen\u00adti\u00adal Read<\/td>\n1750 MB<\/span>\/s<\/td>\n3.2 GB<\/span>\/s<\/td>\n7 GB<\/span>\/s<\/td>\n7 GB<\/span>\/s<\/td>\n<\/tr>\n
Sequen\u00adti\u00adal Write<\/td>\n1500 MB<\/span>\/s<\/td>\n2.5 GB<\/span>\/s<\/td>\n6.1 GB<\/span>\/s<\/td>\n6.1 GB<\/span>\/s<\/td>\n<\/tr>\n
4KB<\/span> Ran\u00addom Read<\/td>\n250k IOPS<\/span><\/td>\n500k IOPS<\/span><\/td>\n1M<\/span> IOPS<\/span><\/td>\n1.5M<\/span> IOPS<\/span><\/td>\n<\/tr>\n
4KB<\/span> Ran\u00addom Write<\/td>\n200k IOPS<\/span><\/td>\n350k IOPS<\/span><\/td>\n800k IOPS<\/span><\/td>\n1M<\/span> IOPS<\/span><\/td>\n<\/tr>\n
Mar\u00adket Segment<\/td>\nCli\u00adent<\/td>\nCli\u00adent<\/td>\nHigh-end Cli\u00adent,
\nDatacenter<\/td>\n		Dat\u00ada\u00adcen\u00adter, Enterprise<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

The Shas\u00adta and Shas\u00adta+ con\u00adtrol\u00adlers are both pri\u00adma\u00adri\u00adly tar\u00adge\u00adting the cli\u00adent SSD<\/span> mar\u00adket, and they are desi\u00adgned as low-cost main\u00adstream solu\u00adti\u00adons. Shas\u00adta has just two PCIe 3 lanes while Shas\u00adta+ has four lanes and con\u00adse\u00adquent\u00adly hig\u00adher per\u00adfor\u00admance, but other\u00adwi\u00adse they are quite simi\u00adlar. Both are 28nm designs and use the NVMe Host Memo\u00adry Buf\u00adfer fea\u00adture rather than inclu\u00adding DRAM<\/span> con\u00adtrol\u00adlers. Both con\u00adtrol\u00adlers are small enough to be packa\u00adged insi\u00adde sin\u00adgle-chip BGA<\/span> SSDs, and Innogrit\u2019s refe\u00adrence designs for Shas\u00adta-based SSDs include the stan\u00addard 11.5x13mm and 16x20mm BGA<\/span> SSD<\/span> foot\u00adprints and a CFX<\/span> card design. The impro\u00adved ECC<\/span> capa\u00adbi\u00adli\u00adties of Shas\u00adta+ will make it a bet\u00adter choice for QLC-based SSDs, but both con\u00adtrol\u00adlers sup\u00adport the full ran\u00adge of SLC<\/span> through QLC<\/span> from mul\u00adti\u00adple manufacturers.<\/p>\n

Becau\u00adse Shas\u00adta and Shas\u00adta+ are step\u00adping stones toward the enter\u00adpri\u00adse and dat\u00ada\u00adcen\u00adter mar\u00adkets, they include sup\u00adport for some fea\u00adtures not com\u00admon\u00adly found on cli\u00adent SSDs, such as an Open-Chan\u00adnel SSD<\/span> ope\u00adra\u00adting mode. End-to-end data path pro\u00adtec\u00adtion is included, with ECC<\/span> on all the controller\u2019s SRAM<\/span> buf\u00adfers and on data stored in the Host Memo\u00adry Buf\u00adfer. Power manage\u00adment appro\u00adpria\u00adte for cli\u00adent and embedded use is sup\u00adport\u00aded, with Shas\u00adta pea\u00adking at 0.9W<\/span> and sup\u00adport\u00ading idle sta\u00adtes at 55mW and less than 1mW, while Shas\u00adta+ will peak at about 1.35W<\/span>. The NVMe Boot Par\u00adti\u00adti\u00adon fea\u00adture is also sup\u00adport\u00aded for embedded sys\u00adtems that don\u2019t include a sepa\u00adra\u00adte boot ROM<\/span> device.<\/p>\n

<\/a><\/p>\n

Innogrit\u2019s Rai\u00adnier con\u00adtrol\u00adler is a signi\u00adfi\u00adcant gene\u00adra\u00adtio\u00adnal advan\u00adce over the Shas\u00adta fami\u00adly, moving up to the high-end cli\u00adent and ent\u00adry-level dat\u00ada\u00adcen\u00adter mar\u00adkets. Rai\u00adnier swit\u00adches to one of TSMC<\/span>\u2019s 16\/12nm Fin\u00adFET pro\u00adces\u00adses, which Inno\u00adgrit (and most other con\u00adtrol\u00adler desi\u00adgners) sees as neces\u00adsa\u00adry for PCIe gen4 sup\u00adport with reasonable power con\u00adsump\u00adti\u00adon. Rai\u00adnier has 8 NAND<\/span> chan\u00adnels that can run at up to 1200MT<\/span>\/s, fast enough for any curr\u00adent\u00adly-available NAND<\/span>. This allows for sequen\u00adti\u00adal read and wri\u00adte speeds of up to 7GB<\/span>\/s and 6.1GB<\/span>\/s respec\u00adtively, more or less satu\u00adra\u00adting the PCIe 4 x4 inter\u00adface. Rai\u00adnier adds enter\u00adpri\u00adse-ori\u00aden\u00adted fea\u00adtures like mul\u00adti\u00adple name\u00adspace sup\u00adport and SR-IOV<\/span> vir\u00adtua\u00adliza\u00adti\u00adon, but cli\u00adent-ori\u00aden\u00adted power manage\u00adment is still sup\u00adport\u00aded, with idle sta\u00adtes for 50mW and less than 2mW.<\/p>\n

The most powerful con\u00adtrol\u00adler on Innogrit\u2019s road\u00admap is Taco\u00adma, which builds on Rai\u00adnier by doubling the NAND<\/span> chan\u00adnel count to 16 (brin\u00adging the maxi\u00admum sup\u00adport\u00aded capa\u00adci\u00adty up to 32TB<\/span>), widening the DRAM<\/span> inter\u00adface to 72 bits (64b with ECC<\/span>), and adding more high-end enter\u00adpri\u00adse fea\u00adtures. Sequen\u00adti\u00adal IO<\/span> per\u00adfor\u00admance will be rough\u00adly the same as for Rai\u00adnier but ran\u00addom IO<\/span> gets a boost from the extra par\u00adal\u00adle\u00adlism. The vir\u00adtua\u00adliza\u00adti\u00adon capa\u00adbi\u00adli\u00adties have been enhan\u00adced rela\u00adti\u00adve to Rai\u00adnier and the NVMe Con\u00adtrol\u00adler Memo\u00adry Buf\u00adfer fea\u00adture is sup\u00adport\u00aded, which comes in han\u00addy for NVMe over Fabrics deploy\u00adments. A spe\u00adcial low-laten\u00adcy mode is intro\u00addu\u00adced, which Inno\u00adgrit will be demons\u00adt\u00adra\u00adting with Toshiba\u2019s XL-FLASH<\/span> (their ans\u00adwer to Samsung\u2019s Z\u2011NAND<\/span>). Per\u00adhaps the most important fea\u00adture of Taco\u00adma is the addi\u00adti\u00adon of in-sto\u00adrage com\u00adpu\u00adte with a deep lear\u00adning acce\u00adle\u00adra\u00adtor; more infor\u00adma\u00adti\u00adon about this will be shared next week during Innogrit\u2019s key\u00adnote pre\u00adsen\u00adta\u00adti\u00adon at Flash Memo\u00adry Summit.<\/p>\n

Innogrit\u2019s busi\u00adness model will be simi\u00adlar to most other inde\u00adpen\u00addent SSD<\/span> con\u00adtrol\u00adler ven\u00addors, offe\u00adring SSD<\/span> ven\u00addors a ran\u00adge of opti\u00adons from a basic SDK<\/span> for cus\u00adtom firm\u00adware up to full turn\u00adkey SSD<\/span> designs. They have seve\u00adral design wins with the Shas\u00adta fami\u00adly con\u00adtrol\u00adlers and are alre\u00ada\u00addy sam\u00adpling the Rai\u00adnier and Taco\u00adma controllers.<\/p>\n","protected":false},"excerpt":{"rendered":"

A new SSD<\/span> con\u00adtrol\u00adler desi\u00adgner is coming out of ste\u00adalth mode today. Inno\u00adgrit was foun\u00added in 2016 by sto\u00adrage indus\u00adtry veterans with the goal of deve\u00adlo\u00adping sto\u00adrage tech\u00adno\u00adlo\u00adgy to sup\u00adport AI<\/span> and big data appli\u00adca\u00adti\u00adons. We spo\u00adke with co-foun\u00ad\u00adder Dr. Zining Wu (form\u00ader\u00adly Marvell\u2019s CTO<\/span>) about the company\u2019s plan\u00adned pro\u00adduct lin\u00ade\u00adup, and he will be (\u2026) Wei\u00adter\u00adle\u00adsen \u00bb<\/a><\/p>\n","protected":false},"author":593,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[22],"tags":[2012,2011,832,1624],"class_list":["post-49182","post","type-post","status-publish","format-standard","hentry","category-pressemitteilungen","tag-controller","tag-innogrit","tag-nvme","tag-pci-express-4-0","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/49182","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/593"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=49182"}],"version-history":[{"count":1,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/49182\/revisions"}],"predecessor-version":[{"id":49184,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/49182\/revisions\/49184"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=49182"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=49182"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=49182"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}