{"id":59823,"date":"2020-11-16T15:01:31","date_gmt":"2020-11-16T14:01:31","guid":{"rendered":"https:\/\/www.planet3dnow.de\/cms\/?p=59823"},"modified":"2020-11-16T21:52:47","modified_gmt":"2020-11-16T20:52:47","slug":"amd-announces-worlds-fastest-hpc-accelerator-for-scientific-research1","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/59823-amd-announces-worlds-fastest-hpc-accelerator-for-scientific-research1\/","title":{"rendered":"<span class=\"caps\">AMD<\/span> Announces World\u2019s Fastest <span class=\"caps\">HPC<\/span> Accelerator for Scientific Research\u00b9"},"content":{"rendered":"<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><i>\ua7f7 <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtors revo\u00adlu\u00adtio\u00adni\u00adze high-per\u00adfor\u00admance com\u00adpu\u00adting (<span class=\"caps\">HPC<\/span>) and <span class=\"caps\">AI<\/span> with indus\u00adtry-lea\u00adding com\u00adpu\u00adte per\u00adfor\u00admance&nbsp;\ua7f7<\/i><\/span><\/span><\/span><\/span><\/p>\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><i>\ua7f7 First <span class=\"caps\">GPU<\/span> acce\u00adle\u00adra\u00adtor with new <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> archi\u00adtec\u00adtu\u00adre engi\u00adnee\u00adred for the exas\u00adca\u00adle era&nbsp;\ua7f7&nbsp;<\/i><\/span><\/span><\/span><\/span><\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span lang=\"pt-PT\"><b><span class=\"caps\">SANTA<\/span> <span class=\"caps\">CLARA<\/span>, Calif. <\/b><\/span><\/span><span style=\"font-family: Arial, serif;\"><b>\u2014 Novem\u00adber 16, 2020 \u2014 <\/b><\/span><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><u><a href=\"http:\/\/www.amd.com\/\"><span class=\"caps\">AMD<\/span><\/a><\/u><\/span><\/span><span style=\"font-family: Arial, serif;\"> (<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>) today announ\u00adced the new <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor \u2013 the world\u2019s fas\u00adtest <span class=\"caps\">HPC<\/span> <span class=\"caps\">GPU<\/span> and the first x86 ser\u00adver <span class=\"caps\">GPU<\/span> to sur\u00adpass the 10 tera\u00adflops (<span class=\"caps\">FP64<\/span>) per\u00adfor\u00admance bar\u00adri\u00ader.<\/span><sup><span style=\"font-family: Arial, serif;\">1<\/span><\/sup><span style=\"font-family: Arial, serif;\"> Sup\u00adport\u00aded by new acce\u00adle\u00adra\u00adted com\u00adpu\u00adte plat\u00adforms from Dell, Giga\u00adbyte, <span class=\"caps\">HPE<\/span>, and Super\u00admi\u00adcro, the <span class=\"caps\">MI100<\/span>, com\u00adbi\u00adned with <span class=\"caps\">AMD<\/span> <span class=\"caps\">EPYC<\/span><\/span><sup><span style=\"font-family: Arial, serif;\"><span class=\"caps\">TM<\/span><\/span><\/sup><span style=\"font-family: Arial, serif;\"> CPUs and the ROCm\u2122 4.0 open soft\u00adware plat\u00adform, is desi\u00adgned to pro\u00adpel new dis\u00adco\u00adveries ahead of the exas\u00adca\u00adle&nbsp;era.&nbsp;<\/span><\/span><\/span><\/span><\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Built on the new <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> archi\u00adtec\u00adtu\u00adre, the <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> <span class=\"caps\">GPU<\/span> enables a new class of acce\u00adle\u00adra\u00adted sys\u00adtems for <span class=\"caps\">HPC<\/span> and <span class=\"caps\">AI<\/span> when pai\u00adred with 2<\/span><sup><span style=\"font-family: Arial, serif;\">nd<\/span><\/sup><span style=\"font-family: Arial, serif;\"> Gen <span class=\"caps\">AMD<\/span> <span class=\"caps\">EPYC<\/span> pro\u00adces\u00adsors. The <span class=\"caps\">MI100<\/span> offers up to 11.5 <span class=\"caps\">TFLOPS<\/span> of peak <span class=\"caps\">FP64<\/span> per\u00adfor\u00admance for <span class=\"caps\">HPC<\/span> and up to 46.1 <span class=\"caps\">TFLOPS<\/span> peak <span class=\"caps\">FP32<\/span> Matrix per\u00adfor\u00admance for <span class=\"caps\">AI<\/span> and machi\u00adne lear\u00adning workloads<\/span><sup><span style=\"font-family: Arial, serif;\">2<\/span><\/sup><span style=\"font-family: Arial, serif;\">. With new <span class=\"caps\">AMD<\/span> Matrix Core tech\u00adno\u00adlo\u00adgy, the <span class=\"caps\">MI100<\/span> also deli\u00advers a near\u00adly 7x boost in <span class=\"caps\">FP16<\/span> theo\u00adre\u00adti\u00adcal peak floa\u00adting point per\u00adfor\u00admance for <span class=\"caps\">AI<\/span> trai\u00adning workloads com\u00adpared to <span class=\"caps\">AMD<\/span>\u2019s pri\u00ador gene\u00adra\u00adti\u00adon acce\u00adle\u00adra\u00adtors.<\/span><sup><span style=\"font-family: Arial, serif;\">3<\/span><\/sup> <\/span><\/span><\/span><\/p>\n<p><span style=\"color: #000000;\"><span class=\"dquo\">\u201c<\/span><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Today <span class=\"caps\">AMD<\/span> takes a major step for\u00adward in the jour\u00adney toward exas\u00adca\u00adle com\u00adpu\u00adting as we unveil the <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> \u2013 the world\u2019s fas\u00adtest <span class=\"caps\">HPC<\/span> <span class=\"caps\">GPU<\/span>,\u201d said Brad McCre\u00addie, cor\u00adpo\u00adra\u00adte vice pre\u00adsi\u00addent, Data Cen\u00adter <span class=\"caps\">GPU<\/span> and Acce\u00adle\u00adra\u00adted Pro\u00adces\u00adsing, <span class=\"caps\">AMD<\/span>. \u201cSqua\u00adre\u00adly tar\u00adge\u00adted toward the workloads that mat\u00adter in sci\u00aden\u00adti\u00adfic com\u00adpu\u00adting, our latest acce\u00adle\u00adra\u00adtor, when com\u00adbi\u00adned with the <span class=\"caps\">AMD<\/span> ROCm open soft\u00adware plat\u00adform, is desi\u00adgned to pro\u00advi\u00adde sci\u00aden\u00adtists and rese\u00adar\u00adchers a supe\u00adri\u00ador foun\u00adda\u00adti\u00adon for their work in&nbsp;<span class=\"caps\">HPC<\/span>.\u201d&nbsp;<\/span><\/span><\/span><\/span><\/p>\n<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Open Soft\u00adware Plat\u00adform for the Exas\u00adca\u00adle&nbsp;Era<\/b><\/span><\/span><\/p>\n<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">The <span class=\"caps\">AMD<\/span> ROCm deve\u00adlo\u00adper soft\u00adware pro\u00advi\u00addes the foun\u00adda\u00adti\u00adon for exas\u00adca\u00adle com\u00adpu\u00adting. As an open source tool\u00adset con\u00adsis\u00adting of com\u00adpi\u00adlers, pro\u00adgramming APIs and libra\u00adri\u00ades, ROCm is used by exas\u00adca\u00adle soft\u00adware deve\u00adlo\u00adpers to crea\u00adte high per\u00adfor\u00admance appli\u00adca\u00adti\u00adons. ROCm 4.0 has been opti\u00admi\u00adzed to deli\u00adver <\/span><\/span><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">per\u00adfor\u00admance at sca\u00adle for MI100-based sys\u00adtems. ROCm 4.0 has upgraded the com\u00adpi\u00adler to be open source and uni\u00adfied to sup\u00adport both OpenMP\u00ae 5.0 and <span class=\"caps\">HIP<\/span>. PyTorch and Ten\u00adsor\u00adflow frame\u00adworks, which have been opti\u00admi\u00adzed with ROCm 4.0, can now achie\u00adve hig\u00adher per\u00adfor\u00admance with <span class=\"caps\">MI100<\/span><\/span><\/span><sup><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">7,8<\/span><\/span><\/sup><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">. ROCm 4.0 is the latest offe\u00adring for <span class=\"caps\">HPC<\/span>, <span class=\"caps\">ML<\/span> and <span class=\"caps\">AI<\/span> appli\u00adca\u00adti\u00adon deve\u00adlo\u00adpers which allows them to crea\u00adte per\u00adfor\u00admance por\u00adta\u00adble software.&nbsp;<\/span><\/span><\/p>\n<p><span class=\"dquo\">\u201c<\/span><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">We\u2019ve recei\u00adved ear\u00adly access to the <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor, and the preli\u00admi\u00adna\u00adry results are very encou\u00adra\u00adging. We\u2019ve typi\u00adcal\u00adly seen signi\u00adfi\u00adcant per\u00adfor\u00admance boosts, up to 2\u20133x com\u00adpared to other GPUs,\u201d said Bron\u00adson Mes\u00adser, direc\u00adtor of sci\u00adence, Oak Ridge Lea\u00adder\u00adship Com\u00adpu\u00adting Faci\u00adli\u00adty. \u201cWhat\u2019s also important to reco\u00adgni\u00adze is the impact soft\u00adware has on per\u00adfor\u00admance. The fact that the ROCm open soft\u00adware plat\u00adform and <span class=\"caps\">HIP<\/span> deve\u00adlo\u00adper tool are open source and work on a varie\u00adty of plat\u00adforms, it is some\u00adthing that we have been abso\u00adlut\u00ade\u00adly almost obses\u00adsed with sin\u00adce we fiel\u00added the very first hybrid <span class=\"caps\">CPU<\/span>\/<span class=\"caps\">GPU<\/span> system.\u201d<\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Key capa\u00adbi\u00adli\u00adties and fea\u00adtures of the <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor include:&nbsp;<\/span><\/span><\/span><\/span><\/p>\n<ul>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>All-New <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> Archi\u00adtec\u00adtu\u00adre-<\/b><\/span><span style=\"font-family: Arial, serif;\"> Engi\u00adnee\u00adred to power <span class=\"caps\">AMD<\/span> GPUs for the exas\u00adca\u00adle era and at the heart of the <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor, the <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> archi\u00adtec\u00adtu\u00adre offers excep\u00adtio\u00adnal per\u00adfor\u00admance and power efficiency<\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>Lea\u00adding <span class=\"caps\">FP64<\/span> and <span class=\"caps\">FP32<\/span> Per\u00adfor\u00admance for <span class=\"caps\">HPC<\/span> Workloads<\/b><\/span><span style=\"font-family: Arial, serif;\"> \u2014 Deli\u00advers indus\u00adtry lea\u00adding 11.5 <span class=\"caps\">TFLOPS<\/span> peak <span class=\"caps\">FP64<\/span> per\u00adfor\u00admance and 23.1 <span class=\"caps\">TFLOPS<\/span> peak <span class=\"caps\">FP32<\/span> per\u00adfor\u00admance, enab\u00adling sci\u00aden\u00adtists and rese\u00adar\u00adchers across the glo\u00adbe to acce\u00adle\u00adra\u00adte dis\u00adco\u00adveries in indus\u00adtries inclu\u00adding life sci\u00aden\u00adces, ener\u00adgy, finan\u00adce, aca\u00adde\u00admics, govern\u00adment, defen\u00adse and more.<\/span><sup><span style=\"font-family: Arial, serif;\">1<\/span><\/sup><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>All-New Matrix Core Tech\u00adno\u00adlo\u00adgy for <span class=\"caps\">HPC<\/span> and <span class=\"caps\">AI<\/span> <\/b><\/span><span style=\"font-family: Arial, serif;\">\u2013 Super\u00adchar\u00adged per\u00adfor\u00admance for a full ran\u00adge of sin\u00adgle and mixed pre\u00adcis\u00adi\u00adon matrix ope\u00adra\u00adti\u00adons, such as <span class=\"caps\">FP32<\/span>, <span class=\"caps\">FP16<\/span>, bFloat16, Int8 and Int4, engi\u00adnee\u00adred to boost the con\u00adver\u00adgence of <span class=\"caps\">HPC<\/span> and&nbsp;<span class=\"caps\">AI<\/span>.<\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>2<\/b><\/span><sup><span style=\"font-family: Arial, serif;\"><b>nd<\/b><\/span><\/sup><span style=\"font-family: Arial, serif;\"><b> Gen <span class=\"caps\">AMD<\/span> Infi\u00adni\u00adty Fabric\u2122 Tech\u00adno\u00adlo\u00adgy \u2013 <\/b><\/span><span style=\"font-family: Arial, serif;\">Instinct <span class=\"caps\">MI100<\/span> pro\u00advi\u00addes ~2x the peer-to-peer (<span class=\"caps\">P2P<\/span>) peak I\/O band\u00adwidth over PCIe\u00ae 4.0 with<\/span><b> <\/b><span style=\"font-family: Arial, serif;\">up to 340 <span class=\"caps\">GB<\/span>\/s of aggre\u00adga\u00adte band\u00adwidth per card with three <span class=\"caps\">AMD<\/span> Infi\u00adni\u00adty Fabric\u2122 Links.<\/span><sup><span style=\"font-family: Arial, serif;\">4<\/span><\/sup><b> <\/b><span style=\"font-family: Arial, serif;\">In a ser\u00adver, <span class=\"caps\">MI100<\/span> GPUs can be con\u00adfi\u00adgu\u00adred with up to two ful\u00adly-con\u00adnec\u00adted quad <span class=\"caps\">GPU<\/span> hives, each pro\u00advi\u00adding up to 552 <span class=\"caps\">GB<\/span>\/s of <span class=\"caps\">P2P<\/span> I\/O band\u00adwidth for fast data sha\u00adring.<\/span><sup><span style=\"font-family: Arial, serif;\">4 <\/span><\/sup><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>Ultra-Fast <span class=\"caps\">HBM2<\/span> Memo\u00adry<\/b><\/span><span style=\"font-family: Arial, serif;\">\u2013 Fea\u00adtures <span class=\"caps\">32GB<\/span> High-band\u00adwidth <span class=\"caps\">HBM2<\/span> memo\u00adry at a clock rate of 1.2 GHz and deli\u00advers an ultra-high 1.23 <span class=\"caps\">TB<\/span>\/s of memo\u00adry band\u00adwidth to sup\u00adport lar\u00adge data sets and help eli\u00admi\u00adna\u00adte bot\u00adt\u00adlen\u00adecks in moving data in and out of memo\u00adry.<\/span><sup><span style=\"font-family: Arial, serif;\">5<\/span><\/sup><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>Sup\u00adport for Industry\u2019s Latest PCIe\u00ae Gen 4.0 <\/b><\/span><span style=\"font-family: Arial, serif;\">\u2013 Desi\u00adgned with the latest PCIe Gen 4.0 tech\u00adno\u00adlo\u00adgy sup\u00adport pro\u00advi\u00adding up to <span class=\"caps\">64GB<\/span>\/s peak theo\u00adre\u00adti\u00adcal trans\u00adport data band\u00adwidth from <span class=\"caps\">CPU<\/span> to <span class=\"caps\">GPU<\/span>.<\/span><sup><span style=\"font-family: Arial, serif;\">6<\/span><\/sup><\/span><\/span><\/span><\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p><span style=\"font-size: small;\"><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-family: Arial, serif;\"><b>Available Ser\u00adver Solutions<\/b><\/span><\/span><\/span><\/p>\n<p><span style=\"font-size: small;\"><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-family: Arial, serif;\">The <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtors are expec\u00adted by end of the year in sys\u00adtems from major <span class=\"caps\">OEM<\/span> and <span class=\"caps\">ODM<\/span> part\u00adners in the enter\u00adpri\u00adse mar\u00adkets, including:<\/span><\/span><\/span><\/p>\n<p><span style=\"font-size: small;\"><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-family: Arial, serif;\"><b>Dell<\/b><\/span><\/span><\/span><\/p>\n<p><span class=\"dquo\">\u201c<\/span><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Dell <span class=\"caps\">EMC<\/span> PowerEdge ser\u00advers will sup\u00adport the new <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span>, which will enable fas\u00adter insights from data. This would help our cus\u00adto\u00admers achie\u00adve more robust and effi\u00adci\u00adent <span class=\"caps\">HPC<\/span> and <span class=\"caps\">AI<\/span> results rapidly,\u201d said Ravi Pen\u00adde\u00adkan\u00adti, seni\u00ador vice pre\u00adsi\u00addent, PowerEdge Ser\u00advers, Dell Tech\u00adno\u00adlo\u00adgies. \u201c<span class=\"caps\">AMD<\/span> has been a valued part\u00adner in our sup\u00adport for advan\u00adcing inno\u00adva\u00adti\u00adon in the data cen\u00adter. The high-per\u00adfor\u00admance capa\u00adbi\u00adli\u00adties of <span class=\"caps\">AMD<\/span> Instinct acce\u00adle\u00adra\u00adtors are a natu\u00adral fit for our PowerEdge ser\u00adver <span class=\"caps\">AI<\/span> <span class=\"amp\">&amp;<\/span> <span class=\"caps\">HPC<\/span> portfolio.\u201d<br>\n<\/span><\/span><\/span><\/p>\n<p><span style=\"font-size: small;\"><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-family: Arial, serif;\"><b>Giga\u00adbyte<\/b><\/span><\/span><\/span><\/p>\n<p><span class=\"dquo\">\u201c<\/span><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">We\u2019re plea\u00adsed to again work with <span class=\"caps\">AMD<\/span> as a stra\u00adte\u00adgic part\u00adner offe\u00adring cus\u00adto\u00admers ser\u00adver hard\u00adware for high per\u00adfor\u00admance com\u00adpu\u00adting,\u201d said Alan Chen, assistant vice pre\u00adsi\u00addent in <span class=\"caps\">NCBU<\/span>, <span class=\"caps\">GIGABYTE<\/span>. \u201c<span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtors repre\u00adsent the next level of high-per\u00adfor\u00admance com\u00adpu\u00adting in the data cen\u00adter, brin\u00adging grea\u00adter con\u00adnec\u00adti\u00advi\u00adty and data band\u00adwidth for ener\u00adgy rese\u00adarch, mole\u00adcu\u00adlar dyna\u00admics, and deep lear\u00adning trai\u00adning. As a new acce\u00adle\u00adra\u00adtor in the <span class=\"caps\">GIGABYTE<\/span> port\u00adfo\u00adlio, our cus\u00adto\u00admers can look to bene\u00adfit from impro\u00adved per\u00adfor\u00admance across a ran\u00adge of sci\u00aden\u00adti\u00adfic and indus\u00adtri\u00adal <span class=\"caps\">HPC<\/span> workloads.\u201d<\/span><\/span><\/span><\/p>\n<p><span style=\"font-size: small;\"><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-family: Arial, serif;\"><b>Hew\u00adlett Packard Enter\u00adpri\u00adse (<span class=\"caps\">HPE<\/span>)<\/b><\/span><\/span><\/span><\/p>\n<p><span class=\"dquo\">\u201c<\/span><span style=\"font-family: Helvetica Neue, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Cus\u00adto\u00admers use <span class=\"caps\">HPE<\/span> Apol\u00adlo sys\u00adtems for pur\u00adpo\u00adse-built capa\u00adbi\u00adli\u00adties and per\u00adfor\u00admance to tack\u00adle a ran\u00adge of com\u00adplex, data-inten\u00adsi\u00adve workloads across high-per\u00adfor\u00admance com\u00adpu\u00adting (<span class=\"caps\">HPC<\/span>), deep lear\u00adning and ana\u00adly\u00adtics,\u201d said Bill Man\u00adnel, vice pre\u00adsi\u00addent and gene\u00adral mana\u00adger, <span class=\"caps\">HPC<\/span> at <span class=\"caps\">HPE<\/span>. \u201cWith the intro\u00adduc\u00adtion of the new <span class=\"caps\">HPE<\/span> Apol\u00adlo 6500 Gen10 Plus sys\u00adtem, we are fur\u00adther advan\u00adcing our port\u00adfo\u00adlio to impro\u00adve workload per\u00adfor\u00admance by sup\u00adport\u00ading the new <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor, which enables grea\u00adter con\u00adnec\u00adti\u00advi\u00adty and data pro\u00adces\u00adsing, along\u00adside the 2<\/span><sup><span style=\"font-family: Arial, serif;\">nd<\/span><\/sup><span style=\"font-family: Arial, serif;\"> Gen <span class=\"caps\">AMD<\/span> <span class=\"caps\">EPYC<\/span>\u2122 pro\u00adces\u00adsor. We look for\u00adward to con\u00adti\u00adnuing our col\u00adla\u00adbo\u00adra\u00adti\u00adon with <span class=\"caps\">AMD<\/span> to expand our offe\u00adrings with its latest CPUs and accelerators.\u201d<\/span><\/span><\/span><\/p>\n<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Super\u00admi\u00adcro<\/b><\/span><\/span><\/p>\n<p><span class=\"dquo\">\u201c<\/span><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">We\u2019re exci\u00adted that <span class=\"caps\">AMD<\/span> is making a big impact in high-per\u00adfor\u00admance com\u00adpu\u00adting with <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> <span class=\"caps\">GPU<\/span> acce\u00adle\u00adra\u00adtors,\u201d said Vik Malya\u00adla, seni\u00ador vice pre\u00adsi\u00addent, field appli\u00adca\u00adti\u00adon engi\u00adnee\u00adring and busi\u00adness deve\u00adlo\u00adp\u00adment, Super\u00admi\u00adcro. \u201cWith the com\u00adbi\u00adna\u00adti\u00adon of the com\u00adpu\u00adte power gai\u00adned with the new <span class=\"caps\">CDNA<\/span> archi\u00adtec\u00adtu\u00adre, along with the high memo\u00adry and <span class=\"caps\">GPU<\/span> peer-to-peer band\u00adwidth the <span class=\"caps\">MI100<\/span> brings, our cus\u00adto\u00admers will get access to gre\u00adat solu\u00adti\u00adons that will meet their acce\u00adle\u00adra\u00adted com\u00adpu\u00adte requi\u00adre\u00adments and <\/span><\/span><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">cri\u00adti\u00adcal enter\u00adpri\u00adse workloads. The <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> will be a gre\u00adat addi\u00adti\u00adon for our mul\u00adti-GPU ser\u00advers and our exten\u00adsi\u00adve port\u00adfo\u00adlio of high-per\u00adfor\u00admance sys\u00adtems and ser\u00adver buil\u00adding block solutions.\u201d<\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b><span class=\"caps\">MI100<\/span> Spe\u00adci\u00adfi\u00adca\u00adti\u00adons<\/b><\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<table width=\"684\" cellspacing=\"0\" cellpadding=\"5\">\n<tbody>\n<tr valign=\"top\">\n<td style=\"background: transparent;\" width=\"57\" height=\"96\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Com\u00adpu\u00adte&nbsp;Units<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"65\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Stream Pro\u00adces\u00adsors<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"59\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">FP64<\/span> <span class=\"caps\">TFLOPS<\/span> (Peak)<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"56\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">FP32<\/span> <span class=\"caps\">TFLOPS<\/span> (Peak)<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"56\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">FP32<\/span> Matrix <span class=\"caps\">TFLOPS<\/span><\/span><\/span><\/span><\/span><\/p>\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">(Peak)<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"65\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">FP16<\/span>\/<span class=\"caps\">FP16<\/span> Matrix<br>\n<span class=\"caps\">TFLOPS<\/span><\/span><\/span><\/span><\/span><\/p>\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">(Peak)<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"59\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">INT4<\/span> | <span class=\"caps\">INT8<\/span>&nbsp;<span class=\"caps\">TOPS<\/span><\/span><\/span><\/span><\/span><\/p>\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">(Peak)<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"56\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">bFloat16 TFLOPs<\/span><\/span><\/span><\/span><\/p>\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">(Peak)<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"50\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">HBM2<\/span><br>\n<span class=\"caps\">ECC<\/span><br>\nMemory<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"58\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Memo\u00adry Bandwidth<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<\/tr>\n<tr valign=\"top\">\n<td style=\"background: transparent;\" width=\"57\" height=\"76\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">120<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"65\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">7680<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"59\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 11.5<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"56\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 23<\/span>.1<\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"56\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 46.1<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"65\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 184.6<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"59\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 184.6<\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td width=\"56\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 92.3 <span class=\"caps\">TFLOPS<\/span><\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"50\">\n<p align=\"center\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">32GB<\/span><\/span><\/span><\/span><\/span><\/p>\n<\/td>\n<td style=\"background: transparent;\" width=\"58\"><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Up to 1.23 <span class=\"caps\">TB<\/span>\/s<\/span><\/span><\/span><\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>&nbsp;<\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>Sup\u00adport\u00ading Resources<\/b><\/span><\/span><\/span><\/span><\/p>\n<ul>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Learn more about <\/span><u><a href=\"https:\/\/www.amd.com\/en\/products\/server-accelerators\/instinct-mi100\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">AMD<\/span> Instinct\u2122 Accelerators<\/span><\/a><\/u><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Learn more about <\/span><u><a href=\"https:\/\/www.amd.com\/en\/campaigns\/high-performance-computing\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">AMD<\/span> <span class=\"caps\">HPC<\/span> Solutions<\/span><\/a><\/u><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><u><a href=\"https:\/\/www.feedback.amd.com\/se\/5A1E27D2561499C9?utm_campaign=register-hpc&amp;utm_medium=redirect&amp;utm_source=301\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">AMD<\/span> <span class=\"caps\">HPC<\/span> Solu\u00adti\u00adons&nbsp;Hub<\/span><\/a><\/u><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Learn more about <\/span><u><a href=\"https:\/\/www.amd.com\/en\/technologies\/cdna\"><span style=\"font-family: Arial, serif;\"><span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span><\/span><\/a><\/u><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Learn more about the <\/span><a href=\"https:\/\/www.amd.com\/en\/processors\/epyc-7002-series\"><u><span style=\"font-family: Arial, serif;\"><span class=\"caps\">AMD<\/span> 2<\/span><\/u><u><sup><span style=\"font-family: Arial, serif;\">nd<\/span><\/sup><\/u><u><span style=\"font-family: Arial, serif;\"> Gen <span class=\"caps\">EPYC<\/span>\u2122 Processor<\/span><\/u><\/a><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Beco\u00adme a fan of <span class=\"caps\">AMD<\/span> on <\/span><span style=\"color: #0563c1;\"><u><a href=\"http:\/\/www.facebook.com\/AMD\"><span style=\"font-family: Arial, serif;\">Face\u00adbook<\/span><\/a><\/u><\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">Fol\u00adlow <span class=\"caps\">AMD<\/span> on <\/span><span style=\"color: #0563c1;\"><u><a href=\"https:\/\/twitter.com\/AMD\"><span style=\"font-family: Arial, serif;\">Twit\u00adter<\/span><\/a><\/u><\/span> <\/span><\/span><\/span><\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><b>About <span class=\"caps\">AMD<\/span><\/b><\/span><\/span><\/span><\/span><\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\">For more than 50 years <span class=\"caps\">AMD<\/span> has dri\u00adven inno\u00adva\u00adti\u00adon in high-per\u00adfor\u00admance com\u00adpu\u00adting, gra\u00adphics and visua\u00adliza\u00adti\u00adon tech\u00adno\u00adlo\u00adgies \u2015 the buil\u00adding blocks for gam\u00ading, immersi\u00adve plat\u00adforms and the data cen\u00adter. Hundreds of mil\u00adli\u00adons of con\u00adsu\u00admers, lea\u00adding For\u00adtu\u00adne 500 busi\u00adnesses and cut\u00adting-edge sci\u00aden\u00adti\u00adfic rese\u00adarch faci\u00adli\u00adties around the world rely on <span class=\"caps\">AMD<\/span> tech\u00adno\u00adlo\u00adgy dai\u00adly to impro\u00adve how they live, work and play. <span class=\"caps\">AMD<\/span> employees around the world are focu\u00adsed on buil\u00adding gre\u00adat pro\u00adducts that push the boun\u00adda\u00adries of what is pos\u00adsi\u00adble. For more infor\u00adma\u00adti\u00adon about how <span class=\"caps\">AMD<\/span> is enab\u00adling today and inspi\u00adring tomor\u00adrow, visit the <span class=\"caps\">AMD<\/span> (<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>)&nbsp;<\/span><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><u><a href=\"https:\/\/www.amd.com\/\"><span lang=\"nl-NL\">web\u00adsite<\/span><\/a><\/u><\/span><\/span><span style=\"font-family: Arial, serif;\">,&nbsp;<\/span><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><u><a href=\"http:\/\/community.amd.com\/welcome\">blog<\/a><\/u><\/span><\/span><span style=\"font-family: Arial, serif;\">,&nbsp;<\/span><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><u><a href=\"https:\/\/www.facebook.com\/AMD\"><span lang=\"nl-NL\">Face\u00adbook<\/span><\/a><\/u><\/span><\/span><span style=\"font-family: Arial, serif;\">&nbsp;and <\/span><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><u><a href=\"https:\/\/twitter.com\/amd\">Twit\u00adter<\/a><\/u><\/span><\/span><span style=\"font-family: Arial, serif;\">&nbsp;<\/span><span style=\"font-family: Arial, serif;\"><span lang=\"pt-PT\">pages.<\/span><\/span><\/span><\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b><span class=\"caps\">CAUTIONARY<\/span> <span class=\"caps\">STATEMENT<\/span><br>\n<\/b><\/span><\/span><span style=\"color: #000000;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">This press release con\u00adta\u00adins for\u00adward-loo\u00adking state\u00adments con\u00adcer\u00adning Advan\u00adced Micro Devices, Inc. (<span class=\"caps\">AMD<\/span>) such as the fea\u00adtures, func\u00adtion\u00ada\u00adli\u00adty, per\u00adfor\u00admance, avai\u00adla\u00adbi\u00adli\u00adty, timing and expec\u00adted bene\u00adfits of <span class=\"caps\">AMD<\/span> pro\u00adducts inclu\u00adding the <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor, which are made pur\u00adsu\u00adant to the Safe Har\u00adbor pro\u00advi\u00adsi\u00adons of the Pri\u00adva\u00adte Secu\u00adri\u00adties Liti\u00adga\u00adti\u00adon Reform Act of 1995. For\u00adward loo\u00adking state\u00adments are com\u00admon\u00adly iden\u00adti\u00adfied by words such as \u201cwould,\u201d \u201cmay,\u201d \u201cexpects,\u201d \u201cbelie\u00adves,\u201d \u201cplans,\u201d \u201cintends,\u201d \u201cpro\u00adjects\u201d and other terms with simi\u00adlar mea\u00adning. Inves\u00adtors are cau\u00adtio\u00adned&nbsp;that<\/span><\/span><\/span><\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">the for\u00adward-loo\u00adking state\u00adments in this press release are based on cur\u00adrent beliefs, assump\u00adti\u00adons and expec\u00adta\u00adti\u00adons, speak only as of the date of this press release and invol\u00adve risks and uncer\u00adtain\u00adties that could cau\u00adse actu\u00adal results to dif\u00adfer mate\u00adri\u00adal\u00adly from cur\u00adrent expec\u00adta\u00adti\u00adons. Such state\u00adments are sub\u00adject to cer\u00adtain known and unknown risks and uncer\u00adtain\u00adties, many of which are dif\u00adfi\u00adcult to pre\u00addict and gene\u00adral\u00adly bey\u00adond <span class=\"caps\">AMD<\/span>\u2019s con\u00adtrol, that could cau\u00adse actu\u00adal results and other future events to dif\u00adfer mate\u00adri\u00adal\u00adly from tho\u00adse expres\u00adsed in, or impli\u00aded or pro\u00adjec\u00adted by, the for\u00adward-loo\u00adking infor\u00adma\u00adti\u00adon and state\u00adments. Mate\u00adri\u00adal fac\u00adtors that could cau\u00adse actu\u00adal results to dif\u00adfer mate\u00adri\u00adal\u00adly from cur\u00adrent expec\u00adta\u00adti\u00adons include, wit\u00adhout limi\u00adta\u00adti\u00adon, the fol\u00adlo\u00adwing: Intel Corporation\u2019s domi\u00adnan\u00adce of the micro\u00adpro\u00adces\u00adsor mar\u00adket and its aggres\u00adsi\u00adve busi\u00adness prac\u00adti\u00adces; the abili\u00adty of third par\u00adty manu\u00adfac\u00adtu\u00adr\u00aders to manu\u00adfac\u00adtu\u00adre <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts on a time\u00adly basis in suf\u00adfi\u00adci\u00adent quan\u00adti\u00adties and using com\u00adpe\u00adti\u00adti\u00adve tech\u00adno\u00adlo\u00adgies; expec\u00adted manu\u00adfac\u00adtu\u00adring yields for <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts; the avai\u00adla\u00adbi\u00adli\u00adty of essen\u00adti\u00adal equip\u00adment, mate\u00adri\u00adals or manu\u00adfac\u00adtu\u00adring pro\u00adces\u00adses; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to intro\u00addu\u00adce pro\u00adducts on a time\u00adly basis with fea\u00adtures and per\u00adfor\u00admance levels that pro\u00advi\u00adde value to its cus\u00adto\u00admers; glo\u00adbal eco\u00adno\u00admic uncer\u00adtain\u00adty; the loss of a signi\u00adfi\u00adcant cus\u00adto\u00admer; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to gene\u00adra\u00adte reve\u00adnue from its semi-cus\u00adtom SoC pro\u00adducts; the impact of the <span class=\"caps\">COVID-19<\/span> pan\u00adde\u00admic on <span class=\"caps\">AMD<\/span>\u2019s busi\u00adness, finan\u00adcial con\u00addi\u00adti\u00adon and results of ope\u00adra\u00adti\u00adons; poli\u00adti\u00adcal, legal, eco\u00adno\u00admic risks and natu\u00adral dis\u00adas\u00adters; the impact of govern\u00adment actions and regu\u00adla\u00adti\u00adons such as export admi\u00adnis\u00adtra\u00adti\u00adon regu\u00adla\u00adti\u00adons, tariffs and trade pro\u00adtec\u00adtion mea\u00adsu\u00adres; the impact of acqui\u00adsi\u00adti\u00adons, joint ven\u00adtures and\/or invest\u00adments on <span class=\"caps\">AMD<\/span>\u2019s busi\u00adness, inclu\u00adding the announ\u00adced acqui\u00adsi\u00adti\u00adon of Xilinx, and the fail\u00adure to inte\u00adgra\u00adte acqui\u00adred busi\u00adnesses; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to com\u00adple\u00adte the Xilinx mer\u00adger; the impact of the announce\u00adment and pen\u00adden\u00adcy of the Xilinx mer\u00adger on <span class=\"caps\">AMD<\/span>\u2019s busi\u00adness; poten\u00adti\u00adal secu\u00adri\u00adty vul\u00adnerabi\u00adli\u00adties; poten\u00adti\u00adal <span class=\"caps\">IT<\/span> outa\u00adges, data loss, data brea\u00adches and cyber-attacks; uncer\u00adtain\u00adties invol\u00adving the orde\u00adring and ship\u00adment of <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts; quar\u00adter\u00adly and sea\u00adso\u00adnal sales pat\u00adterns; the rest\u00adric\u00adtions impo\u00adsed by agree\u00adments gover\u00adning <span class=\"caps\">AMD<\/span>\u2019s notes and the revol\u00adving cre\u00addit faci\u00adli\u00adty; the com\u00adpe\u00adti\u00adti\u00adve mar\u00adkets in which <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts are sold; mar\u00adket con\u00addi\u00adti\u00adons of the indus\u00adtries in which <span class=\"caps\">AMD<\/span> pro\u00adducts are sold; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on third-par\u00adty intellec\u00adtu\u00adal pro\u00adper\u00adty to design and intro\u00addu\u00adce new pro\u00adducts in a time\u00adly man\u00adner; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on third-par\u00adty com\u00adpa\u00adnies for the design, manu\u00adfac\u00adtu\u00adre and sup\u00adp\u00adly of mother\u00adboards, soft\u00adware and other com\u00adpu\u00adter plat\u00adform com\u00adpon\u00adents; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on Micro\u00adsoft Cor\u00adpo\u00adra\u00adti\u00adon and other soft\u00adware ven\u00addors\u2019 sup\u00adport to design and deve\u00adlop soft\u00adware to run on <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on third-par\u00adty dis\u00adtri\u00adbu\u00adtors and add-in-board part\u00adners; the poten\u00adti\u00adal dilu\u00adti\u00adve effect if the 2.125% Con\u00adver\u00adti\u00adble Seni\u00ador Notes due 2026 are con\u00adver\u00adted; future impairm\u00adents of good\u00adwill and tech\u00adno\u00adlo\u00adgy licen\u00adse purcha\u00adses; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to attract and retain qua\u00adli\u00adfied per\u00adson\u00adnel; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to gene\u00adra\u00adte suf\u00adfi\u00adci\u00adent reve\u00adnue and ope\u00adra\u00adting cash flow or obtain exter\u00adnal finan\u00adcing for rese\u00adarch and deve\u00adlo\u00adp\u00adment or other stra\u00adte\u00adgic invest\u00adments; <span class=\"caps\">AMD<\/span>\u2019s indeb\u00adted\u00adness; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to gene\u00adra\u00adte suf\u00adfi\u00adci\u00adent cash to ser\u00advice its debt obli\u00adga\u00adti\u00adons or meet its working capi\u00adtal requi\u00adre\u00adments; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to repurcha\u00adse its out\u00adstan\u00adding debt in the event of a chan\u00adge of con\u00adtrol; the cycli\u00adcal natu\u00adre of the semi\u00adcon\u00adduc\u00adtor indus\u00adtry; the impact of modi\u00adfi\u00adca\u00adti\u00adon or inter\u00adrup\u00adti\u00adon of <span class=\"caps\">AMD<\/span>\u2019s inter\u00adnal busi\u00adness pro\u00adces\u00adses and infor\u00adma\u00adti\u00adon sys\u00adtems; com\u00adpa\u00adti\u00adbi\u00adli\u00adty of <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts with some or all indus\u00adtry-stan\u00addard soft\u00adware and hard\u00adware; cos\u00adts rela\u00adted to defec\u00adti\u00adve pro\u00adducts; the effi\u00adci\u00aden\u00adcy of <span class=\"caps\">AMD<\/span>\u2019s sup\u00adp\u00adly chain; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to rely on third par\u00adty sup\u00adp\u00adly-chain logi\u00adstics func\u00adtions; <span class=\"caps\">AMD<\/span>\u2019s stock pri\u00adce vola\u00adti\u00adli\u00adty; world\u00adwi\u00adde poli\u00adti\u00adcal con\u00addi\u00adti\u00adons; unfa\u00advorable cur\u00adren\u00adcy exch\u00adan\u00adge rate fluc\u00adtua\u00adtions; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to effec\u00adtively con\u00adtrol the sales of its pro\u00adducts on the gray mar\u00adket; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to ade\u00adqua\u00adte\u00adly pro\u00adtect its tech\u00adno\u00adlo\u00adgy or other intellec\u00adtu\u00adal pro\u00adper\u00adty; cur\u00adrent and future claims and liti\u00adga\u00adti\u00adon; poten\u00adti\u00adal tax lia\u00adbi\u00adli\u00adties; and the impact of envi\u00adron\u00admen\u00adtal laws, con\u00adflict mine\u00adrals-rela\u00adted pro\u00advi\u00adsi\u00adons and other laws or regu\u00adla\u00adti\u00adons. Inves\u00adtors are urged to review in detail the risks and uncer\u00adtain\u00adties in <span class=\"caps\">AMD<\/span>\u2019s Secu\u00adri\u00adties and Exch\u00adan\u00adge Com\u00admis\u00adsi\u00adon filings, inclu\u00adding but not limi\u00adt\u00aded to <span class=\"caps\">AMD<\/span>\u2019s Quar\u00adter\u00adly Report on Form 10\u2011Q for the quar\u00adter ended Sep\u00adtem\u00adber 26,&nbsp;2020.<\/span><\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<p><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">\u00a92020 Advan\u00adced Micro Devices, Inc. All rights reser\u00adved. <span class=\"caps\">AMD<\/span>, the <span class=\"caps\">AMD<\/span> Arrow logo, <span class=\"caps\">EPYC<\/span>, <span class=\"caps\">AMD<\/span> Instinct, <\/span><\/span><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Infi\u00adni\u00adty Fabric, ROCm<\/span><\/span><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\"> and com\u00adbi\u00adna\u00adti\u00adons the\u00adreof are trade\u00admarks of Advan\u00adced Micro Devices, Inc. The OpenMP name and the OpenMP logos are regis\u00adtered trade\u00admarks of the OpenMP Archi\u00adtec\u00adtu\u00adre Review Board. PCIe is a regis\u00adtered trade\u00admark of <span class=\"caps\">PCI-SIG<\/span> Cor\u00adpo\u00adra\u00adti\u00adon. Python is a trade\u00admark of the Python Soft\u00adware Foun\u00adda\u00adti\u00adon. PyTorch is a trade\u00admark or regis\u00adtered trade\u00admark of PyTorch. Ten\u00adsor\u00adFlow, the Ten\u00adsor\u00adFlow logo and any rela\u00adted marks are trade\u00admarks of Goog\u00adle Inc. Other pro\u00adduct names used in this publi\u00adca\u00adti\u00adon are for iden\u00adti\u00adfi\u00adca\u00adti\u00adon pur\u00adpo\u00adses only and may be trade\u00admarks of their respec\u00adti\u00adve companies.<\/span><\/span><\/span><\/span><\/span><\/p>\n<ol>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Cal\u00adcu\u00adla\u00adti\u00adons con\u00adduc\u00adted by <span class=\"caps\">AMD<\/span> Per\u00adfor\u00admance Labs as of Sep 18, 2020 for the <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> (<span class=\"caps\">32GB<\/span> <span class=\"caps\">HBM2<\/span> PCIe\u00ae card) acce\u00adle\u00adra\u00adtor at 1,502 MHz peak boost engi\u00adne clock resul\u00adted in 11.54 <span class=\"caps\">TFLOPS<\/span> peak dou\u00adble pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP64<\/span>), 46.1 <span class=\"caps\">TFLOPS<\/span> peak sin\u00adgle pre\u00adcis\u00adi\u00adon matrix (<span class=\"caps\">FP32<\/span>), 23.1 <span class=\"caps\">TFLOPS<\/span> peak sin\u00adgle pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP32<\/span>), 184.6 <span class=\"caps\">TFLOPS<\/span> peak half pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP16<\/span>) peak theo\u00adre\u00adti\u00adcal, floa\u00adting-point per\u00adfor\u00admance. Published results on the NVi\u00addia Ampere <span class=\"caps\">A100<\/span> (<span class=\"caps\">40GB<\/span>) <span class=\"caps\">GPU<\/span> acce\u00adle\u00adra\u00adtor resul\u00adted in 9.7 <span class=\"caps\">TFLOPS<\/span> peak dou\u00adble pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP64<\/span>). 19.5 <span class=\"caps\">TFLOPS<\/span> peak sin\u00adgle pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP32<\/span>), 78 <span class=\"caps\">TFLOPS<\/span> peak half pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP16<\/span>) theo\u00adre\u00adti\u00adcal, floa\u00adting-point per\u00adfor\u00admance. Ser\u00adver manu\u00adfac\u00adtu\u00adr\u00aders may vary con\u00adfi\u00adgu\u00adra\u00adti\u00adon offe\u00adrings yiel\u00adding dif\u00adfe\u00adrent results. <span class=\"caps\">MI100-03<\/span><\/span><\/span> <\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Cal\u00adcu\u00adla\u00adti\u00adons per\u00adfor\u00admed by <span class=\"caps\">AMD<\/span> Per\u00adfor\u00admance Labs as of Sep 3, 2020 on the <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> (<span class=\"caps\">32GB<\/span> <span class=\"caps\">HBM2<\/span> PCIe\u00ae card) acce\u00adle\u00adra\u00adtor at 1,502 MHz peak engi\u00adne clock resul\u00adted in 46.1 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal sin\u00adgle pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP32<\/span> Matrix) Math floa\u00adting-point per\u00adfor\u00admance. The Nvi\u00addia Ampere <span class=\"caps\">A100<\/span> (<span class=\"caps\">40GB<\/span>) <span class=\"caps\">GPU<\/span> acce\u00adle\u00adra\u00adtor published results are 19.5 <span class=\"caps\">TFLOPS<\/span> peak sin\u00adgle <\/span><\/span><\/span><\/span><\/span><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP32<\/span>) floa\u00adting-point per\u00adfor\u00admance. Nvi\u00addia results found at: https:\/\/www.nvidia.com\/content\/dam\/en-zz\/Solutions\/Data-Center\/nvidia-ampere-architecture-whitepaper.pdf. Ser\u00adver manu\u00adfac\u00adtu\u00adr\u00aders may vary con\u00adfi\u00adgu\u00adra\u00adti\u00adon offe\u00adrings yiel\u00adding dif\u00adfe\u00adrent results. <span class=\"caps\">MI100-01<\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Cal\u00adcu\u00adla\u00adti\u00adons per\u00adfor\u00admed by <span class=\"caps\">AMD<\/span> Per\u00adfor\u00admance Labs as of Sep 18, 2020 for the <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor at 1,502 MHz peak boost engi\u00adne clock resul\u00adted in 184.57 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal half pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP16<\/span>) and 46.14 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal sin\u00adgle pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP32<\/span> Matrix) floa\u00adting-point per\u00adfor\u00admance. The results cal\u00adcu\u00adla\u00adted for Rade\u00adon Instinct\u2122 <span class=\"caps\">MI50<\/span> <span class=\"caps\">GPU<\/span> at 1,725 MHz peak engi\u00adne clock resul\u00adted in 26.5 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal half pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP16<\/span>) and 13.25 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal sin\u00adgle pre\u00adcis\u00adi\u00adon (<span class=\"caps\">FP32<\/span> Matrix) floa\u00adting-point per\u00adfor\u00admance. Ser\u00adver manu\u00adfac\u00adtu\u00adr\u00aders may vary con\u00adfi\u00adgu\u00adra\u00adti\u00adon offe\u00adrings yiel\u00adding dif\u00adfe\u00adrent results. <span class=\"caps\">MI100-04<\/span><\/span><\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Cal\u00adcu\u00adla\u00adti\u00adons as of <span class=\"caps\">SEP<\/span> 18th, 2020. <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> built on <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> tech\u00adno\u00adlo\u00adgy acce\u00adle\u00adra\u00adtors sup\u00adport\u00ading PCIe\u00ae Gen4 pro\u00advi\u00adding up to 64 <span class=\"caps\">GB<\/span>\/s peak theo\u00adre\u00adti\u00adcal trans\u00adport data band\u00adwidth from <span class=\"caps\">CPU<\/span> to <span class=\"caps\">GPU<\/span> per card. <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtors include three Infi\u00adni\u00adty Fabric\u2122 links pro\u00advi\u00adding up to 276 <span class=\"caps\">GB<\/span>\/s peak theo\u00adre\u00adti\u00adcal <span class=\"caps\">GPU<\/span> to <span class=\"caps\">GPU<\/span> or Peer-to-Peer (<span class=\"caps\">P2P<\/span>) trans\u00adport rate band\u00adwidth per\u00adfor\u00admance per <span class=\"caps\">GPU<\/span> card. Com\u00adbi\u00adned with PCIe Gen4 sup\u00adport pro\u00advi\u00adding an aggre\u00adga\u00adte <span class=\"caps\">GPU<\/span> card I\/O peak band\u00adwidth of up to 340 <span class=\"caps\">GB<\/span>\/s. MI100s have three links: 92 <span class=\"caps\">GB<\/span>\/s * 3 links per <span class=\"caps\">GPU<\/span> = 276 <span class=\"caps\">GB<\/span>\/s. Four <span class=\"caps\">GPU<\/span> hives pro\u00advi\u00adde up to 552 <span class=\"caps\">GB<\/span>\/s peak theo\u00adre\u00adti\u00adcal <span class=\"caps\">P2P<\/span> per\u00adfor\u00admance. Dual 4 <span class=\"caps\">GPU<\/span> hives in a ser\u00adver pro\u00advi\u00adde up to 1.1 <span class=\"caps\">TB<\/span>\/s total peak theo\u00adre\u00adti\u00adcal direct <span class=\"caps\">P2P<\/span> per\u00adfor\u00admance per ser\u00adver. <span class=\"caps\">AMD<\/span> Infi\u00adni\u00adty Fabric link tech\u00adno\u00adlo\u00adgy not enab\u00adled: Four <span class=\"caps\">GPU<\/span> hives pro\u00advi\u00adde up to 256 <span class=\"caps\">GB<\/span>\/s peak theo\u00adre\u00adti\u00adcal <span class=\"caps\">P2P<\/span> per\u00adfor\u00admance with PCIe\u00ae 4.0. Ser\u00adver manu\u00adfac\u00adtu\u00adr\u00aders may vary con\u00adfi\u00adgu\u00adra\u00adti\u00adon offe\u00adrings yiel\u00adding dif\u00adfe\u00adrent results. <span class=\"caps\">MI100-07<\/span><\/span><\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Cal\u00adcu\u00adla\u00adti\u00adons by <span class=\"caps\">AMD<\/span> Per\u00adfor\u00admance Labs as of Oct 5th, 2020 for the <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor desi\u00adgned with <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> 7nm Fin\u00adFET pro\u00adcess tech\u00adno\u00adlo\u00adgy at 1,200 MHz peak memo\u00adry clock resul\u00adted in 1.2288 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal memo\u00adry band\u00adwidth per\u00adfor\u00admance. The results cal\u00adcu\u00adla\u00adted for Rade\u00adon Instinct\u2122 <span class=\"caps\">MI50<\/span> <span class=\"caps\">GPU<\/span> desi\u00adgned with \u201cVega\u201d 7nm Fin\u00adFET pro\u00adcess tech\u00adno\u00adlo\u00adgy with 1,000 MHz peak memo\u00adry clock resul\u00adted in 1.024 <span class=\"caps\">TFLOPS<\/span> peak theo\u00adre\u00adti\u00adcal memo\u00adry band\u00adwidth per\u00adfor\u00admance. <span class=\"caps\">CDNA-04<\/span><\/span><\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Works with PCIe\u00ae Gen 4.0 and Gen 3.0 com\u00adpli\u00adant mother\u00adboards. Per\u00adfor\u00admance may vary from mother\u00adboard to mother\u00adboard. Refer to sys\u00adtem or mother\u00adboard pro\u00advi\u00adder for indi\u00advi\u00addu\u00adal pro\u00adduct per\u00adfor\u00admance and features.<\/span><\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Test\u00ading Con\u00adduc\u00adted by <span class=\"caps\">AMD<\/span> per\u00adfor\u00admance labs as of Octo\u00adber 30th, 2020, on three plat\u00adforms and soft\u00adware ver\u00adsi\u00adons typi\u00adcal for the launch dates of the Rade\u00adon Instinct <span class=\"caps\">MI25<\/span> (2018), <span class=\"caps\">MI50<\/span> (2019) and <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> <span class=\"caps\">GPU<\/span> (2020) run\u00adning the bench\u00admark appli\u00adca\u00adti\u00adon Quick\u00adsil\u00adver. <span class=\"caps\">MI100<\/span> plat\u00adform (2020): Giga\u00adbyte <span class=\"caps\">G482-Z51-00<\/span> sys\u00adtem com\u00adpri\u00adsed of Dual Socket <span class=\"caps\">AMD<\/span> <span class=\"caps\">EPYC<\/span>\u2122 7702 64-Core Pro\u00adces\u00adsor, <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> <span class=\"caps\">GPU<\/span>, ROCm\u2122 3.10 dri\u00adver, <span class=\"caps\">512GB<\/span> <span class=\"caps\">DDR4<\/span>, <span class=\"caps\">RHEL<\/span> 8.2.&nbsp; <span class=\"caps\">MI50<\/span> plat\u00adform (2019): Super\u00admi\u00adcro\u00ae <span class=\"caps\">SYS-4029GP-TRT2<\/span> sys\u00adtem com\u00adpri\u00adsed of Dual Socket Intel Xeon\u00ae Gold\u00ae 6132, Rade\u00adon Instinct\u2122 <span class=\"caps\">MI50<\/span> <span class=\"caps\">GPU<\/span>, ROCm 2.10 dri\u00adver, 256 <span class=\"caps\">GB<\/span> <span class=\"caps\">DDR4<\/span>, <span class=\"caps\">SLES15SP1<\/span>. <span class=\"caps\">MI25<\/span> plat\u00adform (2018): Super\u00admi\u00adcro <span class=\"caps\">SYS-4028GR-TR2<\/span> sys\u00adtem com\u00adpri\u00adsed of Dual Socket Intel Xeon <span class=\"caps\">CPU<\/span> <span class=\"caps\">E5-2690<\/span>, Rade\u00adon Instinct\u2122 <span class=\"caps\">MI25<\/span> <span class=\"caps\">GPU<\/span>, ROCm 2.0.89 dri\u00adver, <span class=\"caps\">246GB<\/span> <span class=\"caps\">DDR4<\/span> sys\u00adtem memo\u00adry, Ubun\u00adtu 16.04.5 <span class=\"caps\">LTS<\/span>. <span class=\"caps\">MI100-14<\/span><\/span><\/span><\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000000;\"><span style=\"font-family: Calibri, serif;\"><span style=\"font-size: small;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: xx-small;\">Test\u00ading Con\u00adduc\u00adted by <span class=\"caps\">AMD<\/span> per\u00adfor\u00admance labs as of Octo\u00adber 30th, 2020, on three plat\u00adforms and soft\u00adware ver\u00adsi\u00adons typi\u00adcal for the launch dates of the Rade\u00adon Instinct <span class=\"caps\">MI25<\/span> (2018), <span class=\"caps\">MI50<\/span> (2019) and <span class=\"caps\">AMD<\/span> Instinct <span class=\"caps\">MI100<\/span> <span class=\"caps\">GPU<\/span> (2020) run\u00adning the bench\u00admark appli\u00adca\u00adti\u00adon Ten\u00adsor\u00adFlow Res\u00adNet 50 <span class=\"caps\">FP<\/span> 16 batch size 128. <span class=\"caps\">MI100<\/span> plat\u00adform (2020): Giga\u00adbyte <span class=\"caps\">G482-Z51-00<\/span> sys\u00adtem com\u00adpri\u00adsed of Dual Socket <span class=\"caps\">AMD<\/span> <span class=\"caps\">EPYC<\/span>\u2122 7702 64-Core Pro\u00adces\u00adsor, <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> <span class=\"caps\">GPU<\/span>, ROCm\u2122 3.10 dri\u00adver, <span class=\"caps\">512GB<\/span> <span class=\"caps\">DDR4<\/span>, <span class=\"caps\">RHEL<\/span> 8.2. <span class=\"caps\">MI50<\/span> plat\u00adform (2019): Super\u00admi\u00adcro\u00ae <span class=\"caps\">SYS-4029GP-TRT2<\/span> sys\u00adtem com\u00adpri\u00adsed of Dual Socket Intel Xeon\u00ae Gold\u00ae 6254, Rade\u00adon Instinct\u2122 <span class=\"caps\">MI50<\/span> <span class=\"caps\">GPU<\/span>, ROCm 3.0.6 dri\u00adver, 338 <span class=\"caps\">GB<\/span> <span class=\"caps\">DDR4<\/span>, Ubun\u00adtu\u00ae 16.04.6 <span class=\"caps\">LTS<\/span>. <span class=\"caps\">MI25<\/span> plat\u00adform (2018): a Super\u00admi\u00adcro <span class=\"caps\">SYS-4028GR-TR2<\/span> sys\u00adtem com\u00adpri\u00adsed of Dual Socket Intel Xeon <span class=\"caps\">CPU<\/span> <span class=\"caps\">E5-2690<\/span>, Rade\u00adon Instinct\u2122 <span class=\"caps\">MI25<\/span> <span class=\"caps\">GPU<\/span>, ROCm 2.0.89 dri\u00adver, <span class=\"caps\">246GB<\/span> <span class=\"caps\">DDR4<\/span> sys\u00adtem memo\u00adry, Ubun\u00adtu 16.04.5 <span class=\"caps\">LTS<\/span>. <span class=\"caps\">MI100-15<\/span><\/span><\/span><\/span><\/span><\/span><\/li>\n<\/ol>\n","protected":false},"excerpt":{"rendered":"<p><\/p><p align=\"center\"><i>\ua7f7 <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtors revo\u00adlu\u00adtio\u00adni\u00adze high-per\u00adfor\u00admance com\u00adpu\u00adting (<span class=\"caps\">HPC<\/span>) and <span class=\"caps\">AI<\/span> with indus\u00adtry-lea\u00adding com\u00adpu\u00adte per\u00adfor\u00admance&nbsp;\ua7f7<\/i><\/p>\n<p align=\"center\"><i>\ua7f7 First <span class=\"caps\">GPU<\/span> acce\u00adle\u00adra\u00adtor with new <span class=\"caps\">AMD<\/span> <span class=\"caps\">CDNA<\/span> archi\u00adtec\u00adtu\u00adre engi\u00adnee\u00adred for the exas\u00adca\u00adle era&nbsp;\ua7f7&nbsp;<\/i><\/p>\n<p><b><span class=\"caps\">SANTA<\/span> <span class=\"caps\">CLARA<\/span>, Calif. \u2014 Novem\u00adber 16, 2020 \u2014 <\/b><u><a href=\"http:\/\/www.amd.com\/\"><span class=\"caps\">AMD<\/span><\/a><\/u> (<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>) today announ\u00adced the new <span class=\"caps\">AMD<\/span> Instinct\u2122 <span class=\"caps\">MI100<\/span> acce\u00adle\u00adra\u00adtor \u2013 the world\u2019s fas\u00adtest <span class=\"caps\">HPC<\/span> <span class=\"caps\">GPU<\/span> and the first x86 ser\u00adver <span class=\"caps\">GPU<\/span> to sur\u00adpass the 10 tera\u00adflops (<span class=\"caps\">FP64<\/span>) per\u00adfor\u00admance bar\u00adri\u00ader.<sup>1<\/sup> Sup\u00adport\u00aded by new acce\u00adle\u00adra\u00adted com\u00adpu\u00adte plat\u00adforms from Dell, Giga\u00adbyte, <span class=\"caps\">HPE<\/span>, and Super\u00admi\u00adcro, the <span class=\"caps\">MI100<\/span>, com\u00adbi\u00adned with <span class=\"caps\">AMD<\/span> <span class=\"caps\">EPYC<\/span><sup><span class=\"caps\">TM<\/span><\/sup>CPUs and the ROCm\u2122 4.0 open soft\u00adware plat\u00adform, is desi\u00adgned to pro\u00adpel new dis\u00adco\u00adveries ahead of the exas\u00adca\u00adle era.  (\u2026) <a class=\"moretag\" href=\"https:\/\/www.planet3dnow.de\/cms\/59823-amd-announces-worlds-fastest-hpc-accelerator-for-scientific-research1\/\">Wei\u00adter\u00adle\u00adsen&nbsp;\u00bb<\/a><\/p>\n","protected":false},"author":593,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[22],"tags":[966,2299,2463],"class_list":["post-59823","post","type-post","status-publish","format-standard","hentry","category-pressemitteilungen","tag-amd","tag-cdna","tag-mi100","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/59823","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/593"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=59823"}],"version-history":[{"count":5,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/59823\/revisions"}],"predecessor-version":[{"id":59875,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/59823\/revisions\/59875"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=59823"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=59823"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=59823"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}