{"id":64834,"date":"2022-03-27T11:09:40","date_gmt":"2022-03-27T09:09:40","guid":{"rendered":"https:\/\/www.planet3dnow.de\/cms\/?p=64834"},"modified":"2022-03-27T11:09:40","modified_gmt":"2022-03-27T09:09:40","slug":"octavo-systems-announces-amd-xilinx-zynq-ultrascale-mpsoc-system-in-package","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/64834-octavo-systems-announces-amd-xilinx-zynq-ultrascale-mpsoc-system-in-package\/","title":{"rendered":"Octavo Systems Announces AMD-Xilinx Zynq UltraScale+ MPSoC System-in-Package"},"content":{"rendered":"

Hous\u00adton, Texas, United Sta\u00adtes (March 24, 2022) \u2013 Octa\u00advo Sys\u00adtems<\/a>, the lea\u00adder in mass mar\u00adket Sys\u00adtem-in-Packa\u00adge (SiP) solu\u00adti\u00adons, today announ\u00adced a new fami\u00adly of SiP devices based on the AMD<\/span> Xilinx\u00ae Zynq\u00ae UltraS\u00adca\u00adle+\u2122 MPSoC Archi\u00adtec\u00adtu\u00adre<\/a>. The OSDZU3<\/span><\/a>, based on the ZU3<\/span>, pro\u00advi\u00addes the bene\u00adfits of Sys\u00adtem-in-Packa\u00adge while deli\u00adve\u00adring the per\u00adfor\u00admance and fle\u00adxi\u00adbi\u00adli\u00adty expec\u00adted from the Zynq UltraS\u00adca\u00adle+ architecture.<\/span><\/p>\n

The OSDZU3<\/span> lever\u00ada\u00adges Inte\u00adgra\u00adted Cir\u00adcuit manu\u00adfac\u00adtu\u00adring tech\u00adno\u00adlo\u00adgy to integrate:<\/p>\n\n\n\n
\n
    \n
  • AMD-Xilinx Zynq UltraS\u00adca\u00adle+ MPSoC ZU3<\/span><\/li>\n
  • A Com\u00adple\u00adte and Fle\u00adxi\u00adble Power System<\/li>\n
  • LPDDR4<\/span><\/li>\n
  • EEPROM<\/span><\/li>\n
  • QSPI<\/span><\/li>\n
  • MEMS<\/span> Oscil\u00adla\u00adtors<\/li>\n
  • Over one hundred passives<\/li>\n
  • All into a sin\u00adgle 20.5mm x 40mm BGA<\/span><\/li>\n<\/ul>\n<\/td>\n
<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

The OSDZU3<\/span> is about 60% smal\u00adler than an equi\u00adva\u00adlent sys\u00adtem design with dis\u00adcrete com\u00adpon\u00adents. \u201cThe inte\u00adgra\u00adti\u00adon not only makes the OSDZU3<\/span> per\u00adfect for any\u00adbo\u00addy con\u00adcer\u00adned about the Size, Weight, and Power (SWaP) of their pro\u00adduct, it is also ide\u00adal for any\u00adbo\u00addy loo\u00adking to move quick\u00adly through their design,\u201d says Greg Sher\u00adi\u00addan, VP<\/span> Stra\u00adtegy and Mar\u00adke\u00adting at Octa\u00advo Sys\u00adtems. \u201cRemo\u00adving the need to design com\u00adpli\u00adca\u00adted power sys\u00adtems or DDR<\/span> has saved our cus\u00adto\u00admers upwards of 9 months of design.\u201d<\/p>\n

The OSDZU3<\/span> pro\u00advi\u00addes access to all the inter\u00adfaces and fea\u00adtures on the ZU3<\/span>. The 1mm pitch 600 pin ball map pro\u00advi\u00addes access to every I\/O on the ZU3<\/span> in just 2 PCB<\/span> lay\u00aders using low-cost design rules. The power sys\u00adtem also allows the desi\u00adgner to levera\u00adge all the power modes the ZU3<\/span> supports.<\/p>\n

<\/a>
OSDZU3<\/span> 2 Lay\u00ader Escape \u2013 Top Layer<\/figcaption><\/figure>\n
<\/a>
OSDZU3<\/span> 2 Lay\u00ader Escape \u2013 Bot\u00adtom Layer<\/figcaption><\/figure>\n

\u201c<\/span>Sys\u00adtem-level solu\u00adti\u00adons are incre\u00adasing\u00adly important to our cus\u00adto\u00admers, as they seek to deploy cut\u00adting-edge embedded com\u00adpu\u00adting and machi\u00adne lear\u00adning capa\u00adbi\u00adli\u00adties within incre\u00adasing\u00adly com\u00adpres\u00adsed deve\u00adlo\u00adp\u00adment time\u00adframes,\u201d said Han\u00adne\u00adke Kre\u00adkels, vice pre\u00adsi\u00addent of Core Ver\u00adti\u00adcal Mar\u00adkets, Adap\u00adti\u00adve &<\/span> Embedded Com\u00adpu\u00adting Group, AMD<\/span>. \u201cIn-line with the\u00adse objec\u00adti\u00adves, we have work\u00aded clo\u00adse\u00adly with Octa\u00advo Sys\u00adtems to bring the first Sys\u00adtem-in-Packa\u00adge solu\u00adti\u00adon based on the powerful Zynq UltraS\u00adca\u00adle+ MPSoC. This offe\u00adring enables our users to acce\u00adle\u00adra\u00adte inno\u00adva\u00adti\u00adon and sim\u00adpli\u00adfy sys\u00adtem design for the most size cons\u00adtrai\u00adned applications.\u201d<\/p>\n

The OSDZU3<\/span> is com\u00adpa\u00adti\u00adble with the AMD-Xilinx deve\u00adlo\u00adp\u00adment tools, Xilinx Viv\u00ada\u00addo Design Suite and Xilinx Vitis uni\u00adfied soft\u00adware plat\u00adform. Octa\u00advo Sys\u00adtems work\u00aded clo\u00adse\u00adly with Design\u00adLinx<\/a>, an AMD-Xilinx Pre\u00admier Design Ser\u00advice Part\u00adner, to deve\u00adlop the base soft\u00adware plat\u00adform nee\u00added to ensu\u00adre the SiP inte\u00adgra\u00adtes into the stan\u00addard AMD-Xilinx tool flow. \u201cLever\u00adaging our deep know\u00adledge of FPGA<\/span> and Embedded Soft\u00adware design, we work\u00aded with Octa\u00advo to ensu\u00adre the OSDZU3<\/span> works seam\u00adless\u00adly in the stan\u00addard AMD-Xilinx deve\u00adlo\u00adp\u00adment flows. This enables users to take advan\u00adta\u00adge of the SiP in an envi\u00adron\u00adment they are com\u00adfor\u00adta\u00adble with. This expe\u00adri\u00adence allows us to acce\u00adle\u00adra\u00adte our mutu\u00adal customer\u2019s pro\u00adgrams using the OSDZU3<\/span> SiP,\u201d says Bri\u00adan Mul\u00adhearn, Direc\u00adtor of Embedded Solu\u00adti\u00adons, DesignLinx.<\/p>\n

Accom\u00adpany\u00ading the OSDZU3<\/span> Sys\u00adtem-in-Packa\u00adge, Octa\u00advo Sys\u00adtems will be releasing the OSDZU3-REF<\/span><\/a> refe\u00adrence plat\u00adform. It fea\u00adtures popu\u00adlar inter\u00adfaces like USB<\/span>\u2011C, USB<\/span> 3.0, SATA<\/span> Host, 1Gb Ether\u00adnet, and an FMC<\/span> LP<\/span> Con\u00adnec\u00adtor. It also sup\u00adports dis\u00adplays through Dis\u00adplay Port and a LVDS<\/span> touch dis\u00adplay con\u00adnec\u00adtor. It will ship with a Peta\u00adLi\u00adnux Dis\u00adtri\u00adbu\u00adti\u00adon and demos that are also deve\u00adlo\u00adped by DesignLinx.<\/p>\n

<\/a><\/p>\n

Octa\u00advo Sys\u00adtems has also fran\u00adchised Avnet as a glo\u00adbal dis\u00adtri\u00adbu\u00adtor to sup\u00adport the roll out and adop\u00adti\u00adon of the new OSDZU3<\/span> System-in-Package.<\/p>\n

Availability<\/h2>\n

Octa\u00advo Sys\u00adtems has Engi\u00adnee\u00adring Samples available today through their Beta Pro\u00adgram. Design engi\u00adneers who are inte\u00adres\u00adted in gai\u00adning access to the Beta pro\u00adgram can cont\u00adact their local Avnet, Octa\u00advo Sys\u00adtems, or AMD-Xilinx sales representative.<\/p>\n

The refe\u00adrence plat\u00adform will be available to the gene\u00adral mar\u00adket in Q3<\/span> CY2022<\/span> and the OSDZU3<\/span> will be in pro\u00adduc\u00adtion by the end of CY2022<\/span>.<\/p>\n","protected":false},"excerpt":{"rendered":"

Hous\u00adton, Texas, United Sta\u00adtes (March 24, 2022) \u2013 Octa\u00advo Sys\u00adtems<\/a>, the lea\u00adder in mass mar\u00adket Sys\u00adtem-in-Packa\u00adge (SiP) solu\u00adti\u00adons, today announ\u00adced a new fami\u00adly of SiP devices based on the AMD<\/span> Xilinx\u00ae Zynq\u00ae UltraS\u00adca\u00adle+\u2122 MPSoC Archi\u00adtec\u00adtu\u00adre<\/a>. The OSDZU3<\/span><\/a>, based on the ZU3<\/span>, pro\u00advi\u00addes the bene\u00adfits of Sys\u00adtem-in-Packa\u00adge while deli\u00adve\u00adring the per\u00adfor\u00admance and fle\u00adxi\u00adbi\u00adli\u00adty expec\u00adted from the Zynq UltraS\u00adca\u00adle+ architecture.<\/span><\/p>\n

The OSDZU3<\/span> lever\u00ada\u00adges Inte\u00adgra\u00adted Cir\u00adcuit manu\u00adfac\u00adtu\u00adring tech\u00adno\u00adlo\u00adgy to integrate:<\/p>\n\n\n\n
\n
    \n
  • AMD-Xilinx Zynq UltraS\u00adca\u00adle+ MPSoC ZU3<\/span><\/li>\n
  • A Com\u00adple\u00adte and Fle\u00adxi\u00adble Power System<\/li>\n
  • LPDDR4<\/span><\/li>\n
  • EEPROM<\/span><\/li>\n
  • QSPI<\/span><\/li>\n
  • MEMS<\/span> Oscil\u00adla\u00adtors<\/li>\n
  • Over one hundred passives<\/li>\n
  • All into a sin\u00adgle 20.5mm x 40mm BGA<\/span><\/li>\n<\/ul>\n<\/td>\n
<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

(\u2026) Wei\u00adter\u00adle\u00adsen \u00bb<\/a><\/p>\n","protected":false},"author":593,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[22],"tags":[2697,2696,2698,2632],"class_list":["post-64834","post","type-post","status-publish","format-standard","hentry","category-pressemitteilungen","tag-amd-xilinx","tag-octavo-systems","tag-sip","tag-zynq-ultrascale","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/64834","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/593"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=64834"}],"version-history":[{"count":2,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/64834\/revisions"}],"predecessor-version":[{"id":64840,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/64834\/revisions\/64840"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=64834"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=64834"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=64834"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}