{"id":65698,"date":"2022-06-21T16:43:33","date_gmt":"2022-06-21T14:43:33","guid":{"rendered":"https:\/\/www.planet3dnow.de\/cms\/?p=65698"},"modified":"2022-06-21T16:43:33","modified_gmt":"2022-06-21T14:43:33","slug":"ryzen-embedded-r2000-series-with-optimized-performance-and-power-efficiency-for-industrial-machine-vision-iot-and-thin-client-solutions","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/65698-ryzen-embedded-r2000-series-with-optimized-performance-and-power-efficiency-for-industrial-machine-vision-iot-and-thin-client-solutions\/","title":{"rendered":"Ryzen Embedded <span class=\"caps\">R2000<\/span> Series with Optimized Performance and Power Efficiency for Industrial, Machine Vision, IoT and Thin-Client Solutions"},"content":{"rendered":"<h3 class=\"spr-ir-news-article-title\">New Ryzen Embedded R\u2011Series system-on-chips provide up to <span class=\"caps\">2X<\/span> more cores, enhanced Radeon graphics, Windows 11 support, and versatile, multi-display configurability<\/h3>\n<p align=\"left\"><span class=\"caps\">NUREMBURG<\/span>, Ger\u00adma\u00adny, June 21, 2022 (<span class=\"caps\">GLOBE<\/span> <span class=\"caps\">NEWSWIRE<\/span>) \u2014&nbsp;<strong>&nbsp;(Embedded World 2022)&nbsp;<\/strong><a href=\"http:\/\/www.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\"><span class=\"caps\">AMD<\/span><\/a>&nbsp;(<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>) today announ\u00adced the Ryzen\u2122 Embedded <span class=\"caps\">R2000<\/span> Series, second-gene\u00adra\u00adti\u00adon mid-ran\u00adge sys\u00adtem-on-chip (SoC) pro\u00adces\u00adsors opti\u00admi\u00adzed for a wide ran\u00adge of indus\u00adtri\u00adal and robo\u00adtics sys\u00adtems, machi\u00adne visi\u00adon, IoT and thin-cli\u00adent equip\u00adment. Ryzen Embedded <span class=\"caps\">R2000<\/span> Series dou\u00adbles the core count<sup>1<\/sup>&nbsp;and deli\u00advers a signi\u00adfi\u00adcant per\u00adfor\u00admance uplift com\u00adpared to the pri\u00ador gene\u00adra\u00adti\u00adon, with the new <span class=\"caps\">R2515<\/span> model exhi\u00adbi\u00adting up to 81 per\u00adcent hig\u00adher <span class=\"caps\">CPU<\/span><sup>2<\/sup>&nbsp;and gra\u00adphics<sup>3<\/sup>&nbsp;per\u00adfor\u00admance than the com\u00adpa\u00adra\u00adble <span class=\"caps\">R1000<\/span> series pro\u00adces\u00adsor. Per\u00adfor\u00admance-per-watt effi\u00adci\u00aden\u00adcy is also opti\u00admi\u00adzed using \u201cZen+\u201d core archi\u00adtec\u00adtu\u00adre with <span class=\"caps\">AMD<\/span> Rade\u00adon\u2122 gra\u00adphics for rich and ver\u00adsa\u00adti\u00adle mul\u00adti\u00adme\u00addia capa\u00adbi\u00adli\u00adties. Ryzen Embedded <span class=\"caps\">R2000<\/span> pro\u00adces\u00adsors can power up to four inde\u00adpen\u00addent dis\u00adplays in bril\u00adli\u00adant <span class=\"caps\">4K<\/span> resolution.<\/p>\n<p>Embedded <span class=\"caps\">R2000<\/span> Series pro\u00adces\u00adsors are sca\u00adlable up to four \u201cZen+\u201d <span class=\"caps\">CPU<\/span> cores with eight threads, <span class=\"caps\">2MB<\/span> of <span class=\"caps\">L2<\/span> cache and <span class=\"caps\">4MB<\/span> of shared <span class=\"caps\">L3<\/span> cache. This gives embedded sys\u00adtem desi\u00adgners gre\u00adat fle\u00adxi\u00adbi\u00adli\u00adty to sca\u00adle per\u00adfor\u00admance and power effi\u00adci\u00aden\u00adci\u00ades with a sin\u00adgle pro\u00adces\u00adsing platform.<\/p>\n<p>With sup\u00adport for up to 3200 <span class=\"caps\">MT<\/span>\/s <span class=\"caps\">DDR4<\/span> dual-chan\u00adnel memo\u00adry and expan\u00added I\/O con\u00adnec\u00adti\u00advi\u00adty, the Ryzen Embedded <span class=\"caps\">R2000<\/span> Series pro\u00adces\u00adsors deli\u00adver 50 per\u00adcent hig\u00adher memo\u00adry band\u00adwidth<sup>4<\/sup>&nbsp;and up to <span class=\"caps\">2X<\/span> grea\u00adter I\/O con\u00adnec\u00adti\u00advi\u00adty<sup>5<\/sup>&nbsp;com\u00adpared to <span class=\"caps\">R1000<\/span> series processors.<\/p>\n<p><span class=\"dquo\">\u201c<\/span>For indus\u00adtri\u00adal appli\u00adca\u00adti\u00adons like robo\u00adtics and machi\u00adne visi\u00adon as well as thin cli\u00adents and mini-PCs, the Ryzen Embedded <span class=\"caps\">R2000<\/span> Series rai\u00adses the bar on per\u00adfor\u00admance and func\u00adtion\u00ada\u00adli\u00adty,\u201d said Raj\u00adnee\u00adsh Gaur, cor\u00adpo\u00adra\u00adte vice pre\u00adsi\u00addent and gene\u00adral mana\u00adger, Adap\u00adti\u00adve <span class=\"amp\">&amp;<\/span> Embedded Com\u00adpu\u00adting Group at <span class=\"caps\">AMD<\/span>. \u201cThe Embedded <span class=\"caps\">R2000<\/span> Series pro\u00advi\u00addes sys\u00adtem desi\u00adgners with more per\u00adfor\u00admance, opti\u00admi\u00adzed power and bet\u00adter gra\u00adphics, all with a seam\u00adless upgrade path.\u201d<\/p>\n<p><strong>Pro\u00adduct Specifications<\/strong><\/p>\n<table>\n<tbody>\n<tr>\n<td><strong>Model<\/strong><\/td>\n<td><strong><span class=\"caps\">TDP<\/span><br>\nRange<\/strong><\/td>\n<td><strong>Core \/ Thread<br>\nCount<\/strong><\/td>\n<td><strong><span class=\"caps\">GPU<\/span><br>\n<span class=\"caps\">CU<\/span><\/strong><\/td>\n<td><strong>Base <span class=\"caps\">CPU<\/span><br>\nFreq. (GHz)<\/strong><\/td>\n<td><strong><span class=\"caps\">L2<\/span><br>\nCache<\/strong><\/td>\n<td><strong><span class=\"caps\">L3<\/span><br>\nCache<\/strong><\/td>\n<td><strong>Expec\u00adted<br>\nAvailability<\/strong><\/td>\n<\/tr>\n<tr>\n<td><strong><span class=\"caps\">R2544<\/span><\/strong><\/td>\n<td>35\u2013<span class=\"caps\">54W<\/span><\/td>\n<td>4 \/&nbsp;8<\/td>\n<td>8<\/td>\n<td>3.35<\/td>\n<td>2 <span class=\"caps\">MB<\/span><\/td>\n<td>4 <span class=\"caps\">MB<\/span><\/td>\n<td>Octo\u00adber&nbsp;2022<\/td>\n<\/tr>\n<tr>\n<td><strong><span class=\"caps\">R2514<\/span><\/strong><\/td>\n<td>12\u2013<span class=\"caps\">35W<\/span><\/td>\n<td>4 \/&nbsp;8<\/td>\n<td>8<\/td>\n<td>2.1<\/td>\n<td>2 <span class=\"caps\">MB<\/span><\/td>\n<td>4 <span class=\"caps\">MB<\/span><\/td>\n<td>Octo\u00adber&nbsp;2022<\/td>\n<\/tr>\n<tr>\n<td><strong><span class=\"caps\">R2314<\/span><\/strong><\/td>\n<td>12\u2013<span class=\"caps\">35W<\/span><\/td>\n<td>4 \/&nbsp;4<\/td>\n<td>6<\/td>\n<td>2.1<\/td>\n<td>2 <span class=\"caps\">MB<\/span><\/td>\n<td>4 <span class=\"caps\">MB<\/span><\/td>\n<td>In Pro\u00adduc\u00adtion<\/td>\n<\/tr>\n<tr>\n<td><strong><span class=\"caps\">R2312<\/span><\/strong><\/td>\n<td>12\u2013<span class=\"caps\">25W<\/span><\/td>\n<td>2 \/&nbsp;4<\/td>\n<td>3<\/td>\n<td>2.7<\/td>\n<td>1 <span class=\"caps\">MB<\/span><\/td>\n<td>2 <span class=\"caps\">MB<\/span><\/td>\n<td>In Pro\u00adduc\u00adtion<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>Addi\u00adtio\u00adnal Key Fea\u00adtures and Benefits<\/strong><\/p>\n<ul type=\"disc\">\n<li>Power up to four inde\u00adpen\u00addent dis\u00adplays in crisp <span class=\"caps\">4K<\/span> reso\u00adlu\u00adti\u00adon lever\u00adaging Dis\u00adplay\u00adPo\u00adrt\u2122 1.4, <span class=\"caps\">HDMI<\/span>\u2122 2.0b, or eDP 1.3 interfaces<\/li>\n<li>Broad set of high-speed peri\u00adpherals and inter\u00adfaces with up to 16 lanes of PCIe\u00ae Gen3, 2x <span class=\"caps\">SATA<\/span> 3.0 and 6 <span class=\"caps\">USB<\/span> ports (<span class=\"caps\">USB<\/span> 3.2 Gen2 and 2.0)<\/li>\n<li><span class=\"caps\">OS<\/span> sup\u00adport includes Micro\u00adsoft Win\u00addows<sup>\u00ae<\/sup>&nbsp;11\/10, and Linux<sup>\u00ae<\/sup>&nbsp;Ubun\u00adtu<sup>\u00ae<\/sup>&nbsp;<span class=\"caps\">LTS<\/span><\/li>\n<li>Enter\u00adpri\u00adse class secu\u00adri\u00adty fea\u00adtures sup\u00adport\u00aded by the <span class=\"caps\">AMD<\/span> Secu\u00adre Pro\u00adces\u00adsor to help pro\u00adtect sen\u00adsi\u00adti\u00adve data and vali\u00adda\u00adte code befo\u00adre it is exe\u00adcu\u00adted and <span class=\"caps\">AMD<\/span> Memo\u00adry Guard for real-time <span class=\"caps\">DRAM<\/span> memo\u00adry encryption<\/li>\n<li>Plan\u00adned pro\u00adduct avai\u00adla\u00adbi\u00adli\u00adty extends up to 10 years, pro\u00advi\u00adding cus\u00adto\u00admers with a long-life\u00adcy\u00adcle sup\u00adport roadmap<\/li>\n<\/ul>\n<p>The <span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">R2000<\/span> Series will be show\u00adca\u00adsed at the <span class=\"caps\">AMD<\/span> booth (Hall <span class=\"caps\">3A<\/span>, Stand 239) at Embedded World 2022, June 21\u201323, in Nurem\u00adberg, Ger\u00adma\u00adny, The full list of tech\u00adno\u00adlo\u00adgy demons\u00adtra\u00adti\u00adons in the Embedded World booth are available at the <span class=\"caps\">AMD<\/span>&nbsp;<a href=\"https:\/\/www.xilinx.com\/about\/events\/2022\/embedded-world-2022.html\" target=\"_blank\" rel=\"nofollow noopener\">event page<\/a>.<\/p>\n<p><strong>Sup\u00adport\u00ading Resources<\/strong><\/p>\n<ul type=\"disc\">\n<li>Learn more about the&nbsp;<a href=\"https:\/\/www.amd.com\/en\/products\/embedded-ryzen-series\" target=\"_blank\" rel=\"nofollow noopener\"><span class=\"caps\">AMD<\/span> Ryzen Embedded Family<\/a><\/li>\n<li>Ryzen Embedded <span class=\"caps\">R2000<\/span> Series&nbsp;<a href=\"https:\/\/www.amd.com\/system\/files\/documents\/r2000-product-brief.pdf\" target=\"_blank\" rel=\"nofollow noopener\">Pro\u00adduct&nbsp;Brief<\/a><\/li>\n<li>Fol\u00adlow&nbsp;<span class=\"caps\">AMD<\/span>&nbsp;on&nbsp;<a href=\"https:\/\/twitter.com\/AMD\" target=\"_blank\" rel=\"nofollow noopener\">Twit\u00adter<\/a><\/li>\n<li>Con\u00adnect with <span class=\"caps\">AMD<\/span> on&nbsp;<a href=\"https:\/\/www.linkedin.com\/company\/amd\/\" target=\"_blank\" rel=\"nofollow noopener\">Lin\u00adke\u00addIn<\/a><\/li>\n<\/ul>\n<p><strong><span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">R2000<\/span> Series<\/strong>&nbsp;<strong>Eco\u00adsys\u00adtem Support<\/strong><\/p>\n<p><strong>Advan\u00adtech<\/strong><br>\n\u201cAdvan\u00adtech Inno\u00adco\u00adre is plea\u00adsed to announ\u00adce a new addi\u00adti\u00adon to the <span class=\"caps\">DPX<\/span>\u2011S ran\u00adge of gam\u00ading plat\u00adforms. As the 12<sup>th<\/sup>&nbsp;gene\u00adra\u00adti\u00adon of this field-pro\u00adven plat\u00adform, <span class=\"caps\">DPX-S451<\/span> is desi\u00adgned for use in slot machi\u00adnes, casi\u00adno games, and bet\u00adting ter\u00admi\u00adnals. It is based on the new\u00adly released <span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">R2000<\/span> and offers an unbeata\u00adble com\u00adbi\u00adna\u00adti\u00adon of com\u00adpu\u00adting power, gra\u00adphics per\u00adfor\u00admance, and secu\u00adri\u00adty fea\u00adtures ide\u00adal for regu\u00adla\u00adted gam\u00ading. The <span class=\"caps\">R2000<\/span> <span class=\"caps\">SOC<\/span> enables <span class=\"caps\">DPX-S451<\/span> to deli\u00adver supe\u00adri\u00ador per\u00adfor\u00admance when com\u00adpared to pre\u00advious gene\u00adra\u00adti\u00adon solu\u00adti\u00adons (an over 33% increase) while main\u00adtai\u00adning a com\u00adpa\u00adra\u00adtively low-cost point.\u201d \u2014 Dirk Finstel, Asso\u00adcia\u00adte Vice Pre\u00adsi\u00addent Embedded IoT <span class=\"amp\">&amp;<\/span> <span class=\"caps\">CTO<\/span> Euro\u00adpe at Advantech<\/p>\n<p><strong><span class=\"caps\">DFI<\/span><\/strong><br>\n\u201c<span class=\"caps\">DFI<\/span> is inno\u00adva\u00adti\u00adve in desig\u00adning small-size com\u00adpu\u00adters with excep\u00adtio\u00adnal gra\u00adphic per\u00adfor\u00admance for the indus\u00adtri\u00adal and embedded fields inclu\u00adding casi\u00adnos, gam\u00ading, auto\u00adma\u00adti\u00adon, machi\u00adne visi\u00adon, health\u00adca\u00adre and digi\u00adtal signage. With the ground\u00adbrea\u00adking <span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">R2000<\/span> Series, we expect to see many new oppor\u00adtu\u00adni\u00adties for our pro\u00adducts to take our cus\u00adto\u00admers\u2019 appli\u00adca\u00adti\u00adons to a brand-new level through the advan\u00adced gra\u00adphic pro\u00adces\u00adsing and com\u00adpu\u00adting capa\u00adbi\u00adli\u00adties. For appli\u00adca\u00adti\u00adons with strict space cons\u00adtraints, we are curr\u00adent\u00adly deve\u00adlo\u00adping a new, small form fac\u00adtor sin\u00adgle board com\u00adpu\u00adter that com\u00adbi\u00adnes our spe\u00adcia\u00adli\u00adzed minia\u00adtu\u00adriza\u00adti\u00adon tech\u00adno\u00adlo\u00adgy with the <span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">R2000<\/span> for gra\u00adphics-deman\u00adding, ultra-tiny, edge com\u00adpu\u00adting solu\u00adti\u00adons. Expec\u00adta\u00adti\u00adons are to fur\u00adther redu\u00adce cur\u00adrent edge appli\u00adca\u00adti\u00adons\u2019 size with bet\u00adter over\u00adall ima\u00adging and machi\u00adne visi\u00adon ana\u00adly\u00adsis per\u00adfor\u00admance.\u201d \u2014 Jar\u00adry Chang, Seni\u00ador <span class=\"caps\">PM<\/span> Direc\u00adtor,&nbsp;<span class=\"caps\">DFI<\/span><\/p>\n<p><strong><span class=\"caps\">IBASE<\/span><\/strong><br>\n\u201cThe <span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">R2000<\/span> pro\u00adces\u00adsor fami\u00adly is built on the ground\u00adbrea\u00adking \u201cZen 2\u201d x86 core archi\u00adtec\u00adtu\u00adre with impro\u00adved 14nm pro\u00adcess tech\u00adno\u00adlo\u00adgy, advan\u00adced <span class=\"caps\">VEGA<\/span> Gra\u00adphics and high-speed I\/Os, offe\u00adring a strong per\u00adfor\u00admance upgrade from the <span class=\"caps\">R1000<\/span> Series. We are exci\u00adted to be able to imple\u00adment the hot\u00adtest Ryzen Embedded <span class=\"caps\">R2000<\/span> pro\u00adces\u00adsor to our robust embedded plat\u00adforms inclu\u00adding the <span class=\"caps\">MI993<\/span> Mini-ITX mother\u00adboard, <span class=\"caps\">SI-324-N2314<\/span> fan\u00adless digi\u00adtal signage play\u00ader, and <span class=\"caps\">INA1600<\/span> desk\u00adtop uCPE\/<span class=\"caps\">SD-WAN<\/span> appli\u00adance. We look for\u00adward to pro\u00advi\u00adding the right solu\u00adti\u00adons and time-to-mar\u00adket advan\u00adta\u00adge to our cus\u00adto\u00admers\u2019 pro\u00adjects in a wide ran\u00adge of mar\u00adket appli\u00adca\u00adti\u00adons.\u201d \u2014 Albert Lee, Exe\u00adcu\u00adti\u00adve Vice Pre\u00adsi\u00addent at&nbsp;<span class=\"caps\">IBASE<\/span><\/p>\n<p><strong>Sap\u00adphi\u00adre<\/strong><br>\n\u201cSap\u00adphi\u00adre Tech\u00adno\u00adlo\u00adgy is a long\u00adstan\u00adding <span class=\"caps\">AMD<\/span> part\u00adner and lea\u00adding sup\u00adpli\u00ader of com\u00adpon\u00adents and solu\u00adti\u00adons for a broad ran\u00adge of con\u00adsu\u00admer and embedded pro\u00adducts, with exper\u00adti\u00adse in next-gene\u00adra\u00adti\u00adon mother\u00adboards and gra\u00adphics add, mini-STX and play-cen\u00adtric appli\u00adca\u00adti\u00adons. By lever\u00adaging the <span class=\"caps\">AMD<\/span> Ryzen Embedded <span class=\"caps\">V1000<\/span> and <span class=\"caps\">R2000<\/span> SoCs in our latest Sap\u00adphi\u00adre boards, we can increase <span class=\"caps\">CPU<\/span> and <span class=\"caps\">GPU<\/span> per\u00adfor\u00admance in our <span class=\"caps\">NUC<\/span>, mini-STX and thin mini-ITX form fac\u00adtors, dri\u00adving extra\u00ador\u00addi\u00adna\u00adry gra\u00adphics capa\u00adbi\u00adli\u00adties, sup\u00adport\u00ading up to four simul\u00adta\u00adneous <span class=\"caps\">4K<\/span> reso\u00adlu\u00adti\u00adon dis\u00adplays, and pro\u00advi\u00adding unpre\u00adce\u00adden\u00adted per\u00adfor\u00admance-per-watt for our cus\u00adto\u00admers.\u201d \u2014 Adri\u00adan Thomp\u00adson, vice pre\u00adsi\u00addent of mar\u00adke\u00adting, Sap\u00adphi\u00adre Technology<\/p>\n<p><strong>About <span class=\"caps\">AMD<\/span><\/strong><\/p>\n<p>For more than 50 years <span class=\"caps\">AMD<\/span> has dri\u00adven inno\u00adva\u00adti\u00adon in high-per\u00adfor\u00admance com\u00adpu\u00adting, gra\u00adphics and visua\u00adliza\u00adti\u00adon tech\u00adno\u00adlo\u00adgies \u2015 the buil\u00adding blocks for gam\u00ading, immersi\u00adve plat\u00adforms and the dat\u00ada\u00adcen\u00adter. Hundreds of mil\u00adli\u00adons of con\u00adsu\u00admers, lea\u00adding For\u00adtu\u00adne 500 busi\u00adnesses and cut\u00adting-edge sci\u00aden\u00adti\u00adfic rese\u00adarch faci\u00adli\u00adties around the world rely on <span class=\"caps\">AMD<\/span> tech\u00adno\u00adlo\u00adgy dai\u00adly to impro\u00adve how they live, work and play. <span class=\"caps\">AMD<\/span> employees around the world are focu\u00adsed on buil\u00adding gre\u00adat pro\u00adducts that push the boun\u00adda\u00adries of what is pos\u00adsi\u00adble. For more infor\u00adma\u00adti\u00adon about how <span class=\"caps\">AMD<\/span> is enab\u00adling today and inspi\u00adring tomor\u00adrow, visit the <span class=\"caps\">AMD<\/span> (<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>)&nbsp;<a href=\"http:\/\/www.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\">web\u00adsite<\/a>,&nbsp;<a href=\"http:\/\/community.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\">blog<\/a>,&nbsp;<a href=\"https:\/\/www.facebook.com\/AMD\" target=\"_blank\" rel=\"nofollow noopener\">Face\u00adbook<\/a>&nbsp;and&nbsp;<a href=\"https:\/\/twitter.com\/amd\" target=\"_blank\" rel=\"nofollow noopener\">Twit\u00adter<\/a>&nbsp;pages.<\/p>\n<p><strong>Cau\u00adtio\u00adna\u00adry State\u00adment&nbsp;<\/strong>&nbsp;&nbsp;<\/p>\n<p>This press release con\u00adta\u00adins for\u00adward-loo\u00adking state\u00adments con\u00adcer\u00adning Advan\u00adced Micro Devices, Inc. (<span class=\"caps\">AMD<\/span>) such as the fea\u00adtures, func\u00adtion\u00ada\u00adli\u00adty, per\u00adfor\u00admance, avai\u00adla\u00adbi\u00adli\u00adty, timing and expec\u00adted bene\u00adfits of the Ryzen\u2122 Embedded <span class=\"caps\">R2000<\/span> Series, which are made pur\u00adsu\u00adant to the Safe Har\u00adbor pro\u00advi\u00adsi\u00adons of the Pri\u00adva\u00adte Secu\u00adri\u00adties Liti\u00adga\u00adti\u00adon Reform Act of 1995. For\u00adward-loo\u00adking state\u00adments are com\u00admon\u00adly iden\u00adti\u00adfied by words such as \u201cwould,\u201d \u201cmay,\u201d \u201cexpects,\u201d \u201cbelie\u00adves,\u201d \u201cplans,\u201d \u201cintends,\u201d \u201cpro\u00adjects\u201d and other terms with simi\u00adlar mea\u00adning. Inves\u00adtors are cau\u00adtio\u00adned that the for\u00adward-loo\u00adking state\u00adments in this press release are based on cur\u00adrent beliefs, assump\u00adti\u00adons and expec\u00adta\u00adti\u00adons, speak only as of the date of this press release and invol\u00adve risks and uncer\u00adtain\u00adties that could cau\u00adse actu\u00adal results to dif\u00adfer mate\u00adri\u00adal\u00adly from cur\u00adrent expec\u00adta\u00adti\u00adons. Such state\u00adments are sub\u00adject to cer\u00adtain known and unknown risks and uncer\u00adtain\u00adties, many of which are dif\u00adfi\u00adcult to pre\u00addict and gene\u00adral\u00adly bey\u00adond <span class=\"caps\">AMD<\/span>\u2019s con\u00adtrol, that could cau\u00adse actu\u00adal results and other future events to dif\u00adfer mate\u00adri\u00adal\u00adly from tho\u00adse expres\u00adsed in, or impli\u00aded or pro\u00adjec\u00adted by, the for\u00adward-loo\u00adking infor\u00adma\u00adti\u00adon and state\u00adments. Mate\u00adri\u00adal fac\u00adtors that could cau\u00adse actu\u00adal results to dif\u00adfer mate\u00adri\u00adal\u00adly from cur\u00adrent expec\u00adta\u00adti\u00adons include, wit\u00adhout limi\u00adta\u00adti\u00adon, the fol\u00adlo\u00adwing: Intel Corporation\u2019s domi\u00adnan\u00adce of the micro\u00adpro\u00adces\u00adsor mar\u00adket and its aggres\u00adsi\u00adve busi\u00adness prac\u00adti\u00adces; glo\u00adbal eco\u00adno\u00admic uncer\u00adtain\u00adty; loss of a signi\u00adfi\u00adcant cus\u00adto\u00admer; impact of the <span class=\"caps\">COVID-19<\/span> pan\u00adde\u00admic on <span class=\"caps\">AMD<\/span>\u2019s busi\u00adness, finan\u00adcial con\u00addi\u00adti\u00adon and results of ope\u00adra\u00adti\u00adons; com\u00adpe\u00adti\u00adti\u00adve mar\u00adkets in which <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts are sold; mar\u00adket con\u00addi\u00adti\u00adons of the indus\u00adtries in which <span class=\"caps\">AMD<\/span> pro\u00adducts are sold; cycli\u00adcal natu\u00adre of the semi\u00adcon\u00adduc\u00adtor indus\u00adtry; quar\u00adter\u00adly and sea\u00adso\u00adnal sales pat\u00adterns; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to ade\u00adqua\u00adte\u00adly pro\u00adtect its tech\u00adno\u00adlo\u00adgy or other intellec\u00adtu\u00adal pro\u00adper\u00adty; unfa\u00advorable cur\u00adren\u00adcy exch\u00adan\u00adge rate fluc\u00adtua\u00adtions; abili\u00adty of third par\u00adty manu\u00adfac\u00adtu\u00adr\u00aders to manu\u00adfac\u00adtu\u00adre <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts on a time\u00adly basis in suf\u00adfi\u00adci\u00adent quan\u00adti\u00adties and using com\u00adpe\u00adti\u00adti\u00adve tech\u00adno\u00adlo\u00adgies; avai\u00adla\u00adbi\u00adli\u00adty of essen\u00adti\u00adal equip\u00adment, mate\u00adri\u00adals, sub\u00adstra\u00adtes or manu\u00adfac\u00adtu\u00adring pro\u00adces\u00adses; abili\u00adty to achie\u00adve expec\u00adted manu\u00adfac\u00adtu\u00adring yields for <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to intro\u00addu\u00adce pro\u00adducts on a time\u00adly basis with expec\u00adted fea\u00adtures and per\u00adfor\u00admance levels; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to gene\u00adra\u00adte reve\u00adnue from its semi-cus\u00adtom SoC pro\u00adducts; poten\u00adti\u00adal secu\u00adri\u00adty vul\u00adnerabi\u00adli\u00adties; poten\u00adti\u00adal secu\u00adri\u00adty inci\u00addents inclu\u00adding <span class=\"caps\">IT<\/span> outa\u00adges, data loss, data brea\u00adches and cyber-attacks; uncer\u00adtain\u00adties invol\u00adving the orde\u00adring and ship\u00adment of <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on third-par\u00adty intellec\u00adtu\u00adal pro\u00adper\u00adty to design and intro\u00addu\u00adce new pro\u00adducts in a time\u00adly man\u00adner; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on third-par\u00adty com\u00adpa\u00adnies for design, manu\u00adfac\u00adtu\u00adre and sup\u00adp\u00adly of mother\u00adboards, soft\u00adware and other com\u00adpu\u00adter plat\u00adform com\u00adpon\u00adents; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on Micro\u00adsoft and other soft\u00adware ven\u00addors\u2019 sup\u00adport to design and deve\u00adlop soft\u00adware to run on <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts; <span class=\"caps\">AMD<\/span>\u2019s reli\u00adance on third-par\u00adty dis\u00adtri\u00adbu\u00adtors and add-in-board part\u00adners; impact of modi\u00adfi\u00adca\u00adti\u00adon or inter\u00adrup\u00adti\u00adon of <span class=\"caps\">AMD<\/span>\u2019s inter\u00adnal busi\u00adness pro\u00adces\u00adses and infor\u00adma\u00adti\u00adon sys\u00adtems; com\u00adpa\u00adti\u00adbi\u00adli\u00adty of <span class=\"caps\">AMD<\/span>\u2019s pro\u00adducts with some or all indus\u00adtry-stan\u00addard soft\u00adware and hard\u00adware; cos\u00adts rela\u00adted to defec\u00adti\u00adve pro\u00adducts; effi\u00adci\u00aden\u00adcy of <span class=\"caps\">AMD<\/span>\u2019s sup\u00adp\u00adly chain; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to rely on third par\u00adty sup\u00adp\u00adly-chain logi\u00adstics func\u00adtions; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to effec\u00adtively con\u00adtrol sales of its pro\u00adducts on the gray mar\u00adket; impact of govern\u00adment actions and regu\u00adla\u00adti\u00adons such as export admi\u00adnis\u00adtra\u00adti\u00adon regu\u00adla\u00adti\u00adons, tariffs and trade pro\u00adtec\u00adtion mea\u00adsu\u00adres; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to rea\u00adli\u00adze its defer\u00adred tax assets; poten\u00adti\u00adal tax lia\u00adbi\u00adli\u00adties; cur\u00adrent and future claims and liti\u00adga\u00adti\u00adon; impact of envi\u00adron\u00admen\u00adtal laws, con\u00adflict mine\u00adrals-rela\u00adted pro\u00advi\u00adsi\u00adons and other laws or regu\u00adla\u00adti\u00adons; impact of acqui\u00adsi\u00adti\u00adons, joint ven\u00adtures and\/or invest\u00adments on <span class=\"caps\">AMD<\/span>\u2019s busi\u00adness, and abili\u00adty to inte\u00adgra\u00adte acqui\u00adred busi\u00adnesses, such as Xilinx;&nbsp; impact of any impair\u00adment of the com\u00adbi\u00adned company\u2019s assets on the com\u00adbi\u00adned company\u2019s finan\u00adcial posi\u00adti\u00adon and results of ope\u00adra\u00adti\u00adon; rest\u00adric\u00adtions impo\u00adsed by agree\u00adments gover\u00adning <span class=\"caps\">AMD<\/span>\u2019s notes, the gua\u00adran\u00adtees of Xilinx\u2019s notes and the revol\u00adving cre\u00addit faci\u00adli\u00adty; <span class=\"caps\">AMD<\/span>\u2019s indeb\u00adted\u00adness; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to gene\u00adra\u00adte suf\u00adfi\u00adci\u00adent cash to meet its working capi\u00adtal requi\u00adre\u00adments or gene\u00adra\u00adte suf\u00adfi\u00adci\u00adent reve\u00adnue and ope\u00adra\u00adting cash flow to make all of its plan\u00adned R<span class=\"amp\">&amp;<\/span>D or stra\u00adte\u00adgic invest\u00adments; poli\u00adti\u00adcal, legal, eco\u00adno\u00admic risks and natu\u00adral dis\u00adas\u00adters; future impairm\u00adents of good\u00adwill and tech\u00adno\u00adlo\u00adgy licen\u00adse purcha\u00adses; <span class=\"caps\">AMD<\/span>\u2019s abili\u00adty to attract and retain qua\u00adli\u00adfied per\u00adson\u00adnel; <span class=\"caps\">AMD<\/span>\u2019s stock pri\u00adce vola\u00adti\u00adli\u00adty; and world\u00adwi\u00adde poli\u00adti\u00adcal con\u00addi\u00adti\u00adons. Inves\u00adtors are urged to review in detail the risks and uncer\u00adtain\u00adties in <span class=\"caps\">AMD<\/span>\u2019s Secu\u00adri\u00adties and Exch\u00adan\u00adge Com\u00admis\u00adsi\u00adon filings, inclu\u00adding but not limi\u00adt\u00aded to <span class=\"caps\">AMD<\/span>\u2019s most recent reports on Forms 10\u2011K and 10\u2011Q.&nbsp;<\/p>\n<p><strong>\u00a92022 Advan\u00adced Micro Devices, Inc. All rights reser\u00adved. <span class=\"caps\">AMD<\/span>, the <span class=\"caps\">AMD<\/span> Arrow logo, Rade\u00adon, Ryzen, and com\u00adbi\u00adna\u00adti\u00adons the\u00adreof are trade\u00admarks of Advan\u00adced Micro Devices, Inc. 3DMark is a trade\u00admark of Future\u00admark Cor\u00adpo\u00adra\u00adti\u00adon. Dis\u00adplay\u00adPo\u00adrt\u2122 and the Dis\u00adplay\u00adPo\u00adrt\u2122 logo are trade\u00admarks owned by the Video Elec\u00adtro\u00adnics Stan\u00addards Asso\u00adcia\u00adti\u00adon (<span class=\"caps\">VESA<\/span>\u00ae) in the United Sta\u00adtes and other count\u00adries. <span class=\"caps\">HDMI<\/span>, the <span class=\"caps\">HDMI<\/span> logo and High-Defi\u00adni\u00adti\u00adon Mul\u00adti\u00adme\u00addia Inter\u00adface are trade\u00admarks or regis\u00adtered trade\u00admarks of <span class=\"caps\">HDMI<\/span> Licen\u00adsing, <span class=\"caps\">LLC<\/span> in the United Sta\u00adtes and\/or other count\u00adries. PCIe is a regis\u00adtered trade\u00admark of <span class=\"caps\">PCI-SIG<\/span> Cor\u00adpo\u00adra\u00adti\u00adon. Other pro\u00adduct names used in this publi\u00adca\u00adti\u00adon are for iden\u00adti\u00adfi\u00adca\u00adti\u00adon pur\u00adpo\u00adses only and may be trade\u00admarks of their respec\u00adti\u00adve companies.<\/strong><\/p>\n<p><sup>[<\/sup><sup>1]<\/sup>&nbsp;Ryzen\u2122 Embedded <span class=\"caps\">R2000<\/span> SoC offers up to 4 <span class=\"caps\">CPU<\/span> cores. Ryzen\u2122 Embedded <span class=\"caps\">R1000<\/span> SoC offers up to 2 <span class=\"caps\">CPU<\/span> cores. <span class=\"caps\">EMB-178<\/span><br>\n<sup>[<\/sup><sup>2<\/sup><sup>]<\/sup>&nbsp;Test\u00ading con\u00adduc\u00adted by <span class=\"caps\">AMD<\/span> Embedded Soft\u00adware Engi\u00adnee\u00adring Labs as of June 1st, 2022 on the Ryzen\u2122 Embedded <span class=\"caps\">R2514<\/span> and Ryzen\u2122 Embedded <span class=\"caps\">R1606G<\/span> pro\u00adces\u00adsors on <span class=\"caps\">AMD<\/span> <span class=\"caps\">R2000<\/span> Deve\u00adlo\u00adp\u00adment plat\u00adform run\u00adning Win\u00addows 10 Enter\u00adpri\u00adse ver\u00adsi\u00adon <span class=\"caps\">21H2<\/span> on Pass\u00admark v10 \u2014 <span class=\"caps\">CPU<\/span> Mark. The <span class=\"caps\">R2514<\/span> sys\u00adtem used <span class=\"caps\">DDR4-2667<\/span> <span class=\"caps\">RAM<\/span>, <span class=\"caps\">AMD<\/span> Rade\u00adon\u2122 Gra\u00adphics (dri\u00adver ver\u00adsi\u00adon: 22.20\u2013220506a-379436E) and <span class=\"caps\">BIOS<\/span> <span class=\"caps\">TBP1000B<\/span>. The <span class=\"caps\">R1606G<\/span> sys\u00adtem used <span class=\"caps\">DDR4-2400<\/span> <span class=\"caps\">RAM<\/span>, <span class=\"caps\">AMD<\/span> Rade\u00adon\u2122 Gra\u00adphics (dri\u00adver ver\u00adsi\u00adon: 21.50.18\u2013220315a-378119C), and <span class=\"caps\">BIOS<\/span> <span class=\"caps\">RBB1208B<\/span>. Results may vary. <span class=\"caps\">EMB-184<\/span><br>\n<sup>[3]<\/sup>&nbsp;Test\u00ading con\u00adduc\u00adted by <span class=\"caps\">AMD<\/span> Embedded Soft\u00adware Engi\u00adnee\u00adring Labs as of June 1st, 2022 on the Ryzen\u2122 Embedded <span class=\"caps\">R2514<\/span> and Ryzen\u2122 Embedded <span class=\"caps\">R1606G<\/span> pro\u00adces\u00adsors on <span class=\"caps\">AMD<\/span> <span class=\"caps\">R2000<\/span> Deve\u00adlo\u00adp\u00adment plat\u00adform run\u00adning Win\u00addows 10 Enter\u00adpri\u00adse ver\u00adsi\u00adon <span class=\"caps\">21H2<\/span> on 3DMark\u00ae 11\u20133DMarkscore. The <span class=\"caps\">R2514<\/span> sys\u00adtem used <span class=\"caps\">DDR4-2667<\/span> <span class=\"caps\">RAM<\/span>, <span class=\"caps\">AMD<\/span> Rade\u00adon\u2122 Gra\u00adphics (dri\u00adver ver\u00adsi\u00adon: 22.20\u2013220506a-379436E) and <span class=\"caps\">BIOS<\/span> <span class=\"caps\">TBP1000B<\/span>. The <span class=\"caps\">R1606G<\/span> sys\u00adtem used <span class=\"caps\">DDR4-2400<\/span> <span class=\"caps\">RAM<\/span>, <span class=\"caps\">AMD<\/span> Rade\u00adon\u2122 Gra\u00adphics (dri\u00adver ver\u00adsi\u00adon: 21.50.18\u2013220315a-378119C), and <span class=\"caps\">BIOS<\/span> <span class=\"caps\">RBB1208B<\/span>. Results may vary. <span class=\"caps\">EMB-182<\/span><br>\n<sup>[4]<\/sup>&nbsp;Ryzen\u2122 Embedded <span class=\"caps\">R2544<\/span> SoC offers dual-chan\u00adnel 64-bit <span class=\"caps\">DDR4<\/span> up to 3200 <span class=\"caps\">MT<\/span>\/s. Ryzen\u2122 Embedded <span class=\"caps\">R1606G<\/span> SoC offers dual-chan\u00adnel 64-bit <span class=\"caps\">DDR4<\/span> up to 2400 <span class=\"caps\">MT<\/span>\/s. <span class=\"caps\">EMB-179<\/span><br>\n<sup>[5]<\/sup>&nbsp;Ryzen\u2122 Embedded <span class=\"caps\">R2000<\/span> SoC offers up to 16 lanes of PCIe Gen3. Ryzen\u2122 Embedded <span class=\"caps\">R1000<\/span> SoC offers up to 8 lanes of PCIe Gen3. <span class=\"caps\">EMB-180<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p><\/p><h3 class=\"spr-ir-news-article-title\">New Ryzen Embedded R\u2011Series system-on-chips provide up to <span class=\"caps\">2X<\/span> more cores, enhanced Radeon graphics, Windows 11 support, and versatile, multi-display configurability<\/h3>\n<p align=\"left\"><span class=\"caps\">NUREMBURG<\/span>, Ger\u00adma\u00adny, June 21, 2022 (<span class=\"caps\">GLOBE<\/span> <span class=\"caps\">NEWSWIRE<\/span>) \u2014&nbsp;<strong>&nbsp;(Embedded World 2022)&nbsp;<\/strong><a href=\"http:\/\/www.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\"><span class=\"caps\">AMD<\/span><\/a>&nbsp;(<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>) today announ\u00adced the Ryzen\u2122 Embedded <span class=\"caps\">R2000<\/span> Series, second-gene\u00adra\u00adti\u00adon mid-ran\u00adge sys\u00adtem-on-chip (SoC) pro\u00adces\u00adsors opti\u00admi\u00adzed for a wide ran\u00adge of indus\u00adtri\u00adal and robo\u00adtics sys\u00adtems, machi\u00adne visi\u00adon, IoT and thin-cli\u00adent equip\u00adment. Ryzen Embedded <span class=\"caps\">R2000<\/span> Series dou\u00adbles the core count<sup>1<\/sup>&nbsp;and deli\u00advers a signi\u00adfi\u00adcant per\u00adfor\u00admance uplift com\u00adpared to the pri\u00ador gene\u00adra\u00adti\u00adon, with the new <span class=\"caps\">R2515<\/span> model exhi\u00adbi\u00adting up to 81 per\u00adcent hig\u00adher <span class=\"caps\">CPU<\/span><sup>2<\/sup>&nbsp;and gra\u00adphics<sup>3<\/sup>&nbsp;per\u00adfor\u00admance than the com\u00adpa\u00adra\u00adble <span class=\"caps\">R1000<\/span> series pro\u00adces\u00adsor. Per\u00adfor\u00admance-per-watt effi\u00adci\u00aden\u00adcy is also opti\u00admi\u00adzed using \u201cZen+\u201d core archi\u00adtec\u00adtu\u00adre with <span class=\"caps\">AMD<\/span> Rade\u00adon\u2122 gra\u00adphics for rich and ver\u00adsa\u00adti\u00adle mul\u00adti\u00adme\u00addia capa\u00adbi\u00adli\u00adties. Ryzen Embedded <span class=\"caps\">R2000<\/span> pro\u00adces\u00adsors can power up to four inde\u00adpen\u00addent dis\u00adplays in bril\u00adli\u00adant <span class=\"caps\">4K<\/span> resolution.<\/p>\n<p>Embedded <span class=\"caps\">R2000<\/span> Series pro\u00adces\u00adsors are sca\u00adlable up to four \u201cZen+\u201d <span class=\"caps\">CPU<\/span> cores with eight threads, <span class=\"caps\">2MB<\/span> of <span class=\"caps\">L2<\/span> cache and <span class=\"caps\">4MB<\/span> of shared <span class=\"caps\">L3<\/span> cache. This gives embedded sys\u00adtem desi\u00adgners gre\u00adat fle\u00adxi\u00adbi\u00adli\u00adty to sca\u00adle per\u00adfor\u00admance and power effi\u00adci\u00aden\u00adci\u00ades with a sin\u00adgle pro\u00adces\u00adsing plat\u00adform. (\u2026) <a class=\"moretag\" href=\"https:\/\/www.planet3dnow.de\/cms\/65698-ryzen-embedded-r2000-series-with-optimized-performance-and-power-efficiency-for-industrial-machine-vision-iot-and-thin-client-solutions\/\">Wei\u00adter\u00adle\u00adsen&nbsp;\u00bb<\/a><\/p>\n","protected":false},"author":593,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[22],"tags":[966,2746,1562],"class_list":["post-65698","post","type-post","status-publish","format-standard","hentry","category-pressemitteilungen","tag-amd","tag-r2000","tag-ryzen-embedded","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/65698","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/593"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=65698"}],"version-history":[{"count":1,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/65698\/revisions"}],"predecessor-version":[{"id":65699,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/65698\/revisions\/65699"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=65698"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=65698"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=65698"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}