{"id":67024,"date":"2022-11-15T18:00:20","date_gmt":"2022-11-15T17:00:20","guid":{"rendered":"https:\/\/www.planet3dnow.de\/cms\/?p=67024"},"modified":"2022-11-15T18:00:20","modified_gmt":"2022-11-15T17:00:20","slug":"amd-announces-completion-of-class-b-qualification-for-first-space-grade-versal-adaptive-socs-enabling-on-board-ai-processing-in-space","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/67024-amd-announces-completion-of-class-b-qualification-for-first-space-grade-versal-adaptive-socs-enabling-on-board-ai-processing-in-space\/","title":{"rendered":"AMD<\/span> Announces Completion of Class B Qualification for First Space-Grade Versal Adaptive SoCs Enabling On-Board AI<\/span> Processing in Space"},"content":{"rendered":"

\u2014 First ship\u00adments of radia\u00adti\u00adon-tole\u00adrant Ver\u00adsal AI<\/span> Core devices deli\u00adve\u00adring high-band\u00adwidth signal pro\u00adces\u00adsing and AI<\/span> infe\u00adren\u00adcing for space appli\u00adca\u00adti\u00adons on track for ear\u00adly next year \u2014<\/em><\/p>\n

SANTA<\/span> CLARA<\/span>, Calif. 11\/15\/2022<\/p>\n

AMD<\/span><\/a> (NASDAQ<\/span>: AMD<\/span>) today announ\u00adced it has com\u00adple\u00adted Class B qua\u00adli\u00adfi\u00adca\u00adti\u00adon for the company\u2019s first space-gra\u00adde Ver\u00adsal\u2122<\/a> adap\u00adti\u00adve SoCs. The XQR<\/span> Ver\u00adsal\u2122 AI<\/span> Core XQRVC1902<\/span> devices deli\u00adver full radia\u00adti\u00adon tole\u00adrance, acce\u00adle\u00adra\u00adted AI<\/span> infe\u00adren\u00adcing and high-band\u00adwidth signal pro\u00adces\u00adsing per\u00adfor\u00admance for satel\u00adli\u00adte and space appli\u00adca\u00adti\u00adons. The com\u00adple\u00adti\u00adon of Class B qua\u00adli\u00adfi\u00adca\u00adti\u00adon, deri\u00adved from the US<\/span> mili\u00adta\u00adry spe\u00adci\u00adfi\u00adca\u00adti\u00adon MIL-PRF-38535<\/span>, allows the devices to begin ship\u00adping in ear\u00adly 2023.<\/p>\n

The radia\u00adti\u00adon-tole\u00adrant XQR<\/span> Ver\u00adsal AI<\/span> Core XQRVC1902<\/span> devices repre\u00adsent a major leap for\u00adward in enab\u00adling sophisti\u00adca\u00adted on-board data pro\u00adces\u00adsing and AI<\/span> infe\u00adren\u00adcing appli\u00adca\u00adti\u00adons in space. Until now, high\u00adly com\u00adplex AI<\/span> appli\u00adca\u00adti\u00adons could only be per\u00adfor\u00admed with cus\u00adtom-desi\u00adgned ASICs, which are pro\u00adhi\u00adbi\u00adtively expen\u00adsi\u00adve for most space programs.<\/p>\n

In con\u00adtrast to ASICs, the XQR<\/span> Ver\u00adsal adap\u00adti\u00adve SoC sup\u00adports repro\u00adgramming during deve\u00adlo\u00adp\u00adment as well as after deploy\u00adment, inclu\u00adding in-flight in the harsh radia\u00adti\u00adon envi\u00adron\u00adment of space. This per\u00admits satel\u00adli\u00adte ope\u00adra\u00adtors to chan\u00adge pro\u00adces\u00adsing algo\u00adrith\u00adms after a satel\u00adli\u00adte has been laun\u00adched, allo\u00adwing for pre\u00advious\u00adly unavailable fle\u00adxi\u00adbi\u00adli\u00adty in remo\u00adte sens\u00ading and com\u00admu\u00adni\u00adca\u00adti\u00adons appli\u00adca\u00adti\u00adons. The radia\u00adti\u00adon tole\u00adrance of the XQR<\/span> Ver\u00adsal has been tes\u00adted by AMD<\/span> and inde\u00adpen\u00addent orga\u00adniza\u00adti\u00adons and has been deter\u00admi\u00adned to be capa\u00adble of sup\u00adport\u00ading mis\u00adsi\u00adons from low-earth orbit to geo\u00adsyn\u00adchro\u00adno\u00adus earth orbit and beyond.<\/p>\n

\u201c<\/span>Ray\u00adthe\u00adon is basing our next-gene\u00adra\u00adti\u00adon space pro\u00adces\u00adsors on the XQR<\/span> Ver\u00adsal adap\u00adti\u00adve SoCs due to the chip\u2019s per\u00adfor\u00admance in various radia\u00adti\u00adon envi\u00adron\u00adments and its high qua\u00adli\u00adty levels,\u201d said Bar\u00adry Liu, seni\u00ador direc\u00adtor, Space Sys\u00adtems at Ray\u00adthe\u00adon Intel\u00adli\u00adgence and Space. \u201cIts hete\u00adro\u00adge\u00adneous com\u00adpu\u00adting capa\u00adbi\u00adli\u00adties and recon\u00adfi\u00adgura\u00adble logic fabric will enable our teams to inte\u00adgra\u00adte more on-board pro\u00adces\u00adsing in a con\u00adsider\u00ada\u00adb\u00adly smal\u00adler foot\u00adprint, enab\u00adling unpre\u00adce\u00adden\u00adted advan\u00adces in sys\u00adtem-level size, weight and power (SWaP).\u201d<\/p>\n

7nm Versal Adaptive SoC architecture<\/h3>\n

The XQR<\/span> Ver\u00adsal AI<\/span> Core<\/a> adap\u00adti\u00adve SoCs offer advan\u00adced signal pro\u00adces\u00adsing and AI<\/span> infe\u00adren\u00adcing capa\u00adbi\u00adli\u00adty in a hete\u00adro\u00adge\u00adneous com\u00adpu\u00adting plat\u00adform. The devices fea\u00adture dual-core Arm\u00ae Cor\u00adtex-A72 and dual-core Arm Cor\u00adtex-R5 embedded pro\u00adces\u00adsors, 400 AI<\/span>\/ML<\/span> com\u00adpu\u00adte engi\u00adnes, almost 900,000 logic cells, and 191M<\/span> bits of memo\u00adry, all con\u00adnec\u00adted with a net\u00adwork-on-chip and fabri\u00adca\u00adted on a 7nm CMOS<\/span> process.<\/p>\n

Deve\u00adlo\u00adpers can pro\u00addu\u00adce designs for XQR<\/span> Ver\u00adsal devices using the AMD<\/span> Xilinx Viv\u00ada\u00addo\u2122<\/a> tool suite and Vitis\u2122 AI<\/span><\/a> soft\u00adware plat\u00adform from a varie\u00adty of deve\u00adlo\u00adper tools and indus\u00adtry-stan\u00addard frame\u00adworks, inclu\u00adding RTL<\/span>, C and C++, Mat\u00adlab, Caf\u00adfe, Ten\u00adsor\u00adFlow, PyTorch and others.<\/p>\n

\u201c<\/span>The Class B qua\u00adli\u00adfi\u00adca\u00adti\u00adon marks a signi\u00adfi\u00adcant mile\u00adstone in the intro\u00adduc\u00adtion of advan\u00adced pro\u00adgramma\u00adble solu\u00adti\u00adons for space appli\u00adca\u00adti\u00adons,\u201d said Minal Sawant, seni\u00ador direc\u00adtor of Aero\u00adspace and Defen\u00adse Ver\u00adti\u00adcal Mar\u00adket, AMD<\/span>. \u201cWe have prio\u00adri\u00adti\u00adzed an acce\u00adle\u00adra\u00adted sche\u00addu\u00adle for the Ver\u00adsal adap\u00adti\u00adve SoC Class B qua\u00adli\u00adfi\u00adca\u00adti\u00adon, all while ensu\u00adring a tho\u00adrough and rigo\u00adrous approach to the test\u00ading and ana\u00adly\u00adsis neces\u00adsa\u00adry to qua\u00adli\u00adfy devices for use in space. We are exci\u00adted to start sche\u00addu\u00adling cus\u00adto\u00admers\u2019 orders for flight-gra\u00adde Ver\u00adsal devices.\u201d<\/p>\n

The AMD<\/span> Class B qua\u00adli\u00adfi\u00adca\u00adti\u00adon and manu\u00adfac\u00adtu\u00adring test flow is based on the US<\/span> Depart\u00adment of Defen\u00adse MIL-PRF-38535<\/span> Class B spe\u00adci\u00adfi\u00adca\u00adti\u00adon for qua\u00adli\u00adfi\u00adca\u00adti\u00adon and test\u00ading of mono\u00adli\u00adthic inte\u00adgra\u00adted cir\u00adcuits and has been adapt\u00aded for the advan\u00adced orga\u00adnic pack\u00ada\u00adging AMD<\/span> is using for XQR<\/span> Ver\u00adsal space-gra\u00adde products.<\/p>\n

Supporting Resources<\/h3>\n