{"id":67034,"date":"2022-11-16T15:11:52","date_gmt":"2022-11-16T14:11:52","guid":{"rendered":"https:\/\/www.planet3dnow.de\/cms\/?p=67034"},"modified":"2022-11-16T15:11:52","modified_gmt":"2022-11-16T14:11:52","slug":"amd-powers-aisin-next-generation-automated-parking-assist-system","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/67034-amd-powers-aisin-next-generation-automated-parking-assist-system\/","title":{"rendered":"<span class=\"caps\">AMD<\/span> Powers Aisin Next-Generation Automated Parking Assist System"},"content":{"rendered":"<h3>\u2500\u2500 <span class=\"caps\">AMD<\/span> Zynq UltraScale+ MPSoC automotive platform with deep learning processor advances low-latency, AI-based image processing for automated parking system&nbsp;\u2500\u2500<\/h3>\n<p align=\"left\"><span class=\"caps\">SANTA<\/span> <span class=\"caps\">CLARA<\/span>, Calif., Nov. 16, 2022 (<span class=\"caps\">GLOBE<\/span> <span class=\"caps\">NEWSWIRE<\/span>) \u2014&nbsp;<a href=\"http:\/\/www.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\"><span class=\"caps\">AMD<\/span><\/a>&nbsp;(<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>) announ\u00adced today that the <span class=\"caps\">AMD<\/span> Xilinx Auto\u00admo\u00adti\u00adve (<span class=\"caps\">XA<\/span>) Zynq<sup><em>\u00ae<\/em><\/sup>&nbsp;UltraS\u00adca\u00adle+<sup><em>\u2122<\/em><\/sup>&nbsp;MPSoC plat\u00adform has been sel\u00adec\u00adted to power the Aisin Auto\u00adma\u00adted Par\u00adking-Assist (<span class=\"caps\">APA<\/span>) sys\u00adtem. The high\u00adly adap\u00adta\u00adble <span class=\"caps\">XA<\/span> Zynq UltraS\u00adca\u00adle+ MPSoC plat\u00adform enables the next-gene\u00adra\u00adti\u00adon Aisin <span class=\"caps\">APA<\/span> sys\u00adtem to detect pede\u00adstri\u00adans, vehic\u00adles and free space effi\u00adci\u00adent\u00adly and at extre\u00adme\u00adly low laten\u00adcy. The Aisin <span class=\"caps\">APA<\/span> sys\u00adtem will begin ship\u00adping in model year&nbsp;2024.<\/p>\n<p>The <span class=\"caps\">XA<\/span> Zynq UltraS\u00adca\u00adle+ MPSoC plat\u00adform \u2014 deploy\u00aded in the came\u00adras within the Aisin <span class=\"caps\">APA<\/span> sys\u00adtem \u2014 com\u00adbi\u00adnes a high-per\u00adfor\u00admance Arm<sup>\u00ae<\/sup>-based mul\u00adti\u00adco\u00adre, mul\u00adtipro\u00adces\u00adsing sys\u00adtem with ASIC-class pro\u00adgramma\u00adble logic con\u00adtai\u00adning cus\u00adtom co-pro\u00adces\u00adsors that can be opti\u00admi\u00adzed to meet sys\u00adtem needs, inclu\u00adding a deep lear\u00adning pro\u00adces\u00adsor unit for con\u00advo\u00adlu\u00adtio\u00adnal neu\u00adral net\u00adwork (<span class=\"caps\">CNN<\/span>) pro\u00adces\u00adsing. This enables machi\u00adne lear\u00adning-based sce\u00adne seg\u00admen\u00adta\u00adti\u00adon and object detec\u00adtion for the Aisin <span class=\"caps\">APA<\/span> sys\u00adtem. The <span class=\"caps\">XA<\/span> Zynq MPSoC plat\u00adform deli\u00advers maxi\u00admum pro\u00adces\u00adsing effi\u00adci\u00aden\u00adcy and is capa\u00adble of off\u00adloa\u00adding cri\u00adti\u00adcal func\u00adtions, such as gra\u00adphics and video pipe\u00adlining, to dedi\u00adca\u00adted pro\u00adces\u00adsing blocks to enable low-laten\u00adcy image processing.<\/p>\n<p>The Aisin <span class=\"caps\">APA<\/span> sys\u00adtem uses four came\u00adras and 12 ultra\u00adso\u00adnic sen\u00adsors moun\u00adted on the vehic\u00adle to reco\u00adgni\u00adze the sur\u00adroun\u00adding envi\u00adron\u00adment and cal\u00adcu\u00adla\u00adte the dri\u00adving rou\u00adte. The sys\u00adtem then con\u00adtrols the vehic\u00adle accor\u00adding to the cal\u00adcu\u00adla\u00adted rou\u00adte to park its\u00adelf. In addi\u00adti\u00adon, the Aisin <span class=\"caps\">APA<\/span> sys\u00adtem also auto\u00adma\u00adti\u00adcal\u00adly per\u00adforms auto\u00adma\u00adted emer\u00adgen\u00adcy bra\u00adking in the event of a poten\u00adti\u00adal collision.<\/p>\n<p><span class=\"dquo\">\u201c<\/span>Aisin\u2019s <span class=\"caps\">APA<\/span> sys\u00adtem lever\u00ada\u00adges com\u00adplex <span class=\"caps\">AI<\/span> and requi\u00adres an SoC deli\u00adve\u00adring high per\u00adfor\u00admance and low laten\u00adcy, which led us to choo\u00adsing the <span class=\"caps\">AMD<\/span> Xilinx <span class=\"caps\">XA<\/span> Zynq UltraS\u00adca\u00adle+ MPSoC plat\u00adform,\u201d said Mori\u00adto Oshi\u00adta, pre\u00adsi\u00addent, Chas\u00adsis and Vehic\u00adle Safe\u00adty Sys\u00adtem Com\u00adpa\u00adny, Aisin Cor\u00adpo\u00adra\u00adti\u00adon. \u201cBasic sur\u00adround-view sys\u00adtems redu\u00adced some of the chal\u00adlenges of manu\u00adal par\u00adking for con\u00adsu\u00admers, whe\u00adre\u00adas <span class=\"caps\">APA<\/span> sys\u00adtems can now signi\u00adfi\u00adcant\u00adly ease the stress of par\u00adking in tight spots. We are plea\u00adsed to start deve\u00adlo\u00adp\u00adment and bring this solu\u00adti\u00adon to consumers.\u201d<\/p>\n<p><span class=\"dquo\">\u201c<\/span>As sur\u00adround-view sys\u00adtems evol\u00adve from basic video stit\u00adching and gra\u00adphic over\u00adlays that visual\u00adly assist dri\u00advers, to cars now being able to use <span class=\"caps\">AI<\/span> to park them\u00adsel\u00adves \u2014 we see a huge oppor\u00adtu\u00adni\u00adty to sup\u00adport the needs of this mar\u00adket with our adap\u00adta\u00adble Zynq plat\u00adform,\u201d said Han\u00adne\u00adke Kre\u00adkels, cor\u00adpo\u00adra\u00adte vice pre\u00adsi\u00addent, Core Ver\u00adti\u00adcal Mar\u00adkets, <span class=\"caps\">AMD<\/span>. \u201cAisin is lea\u00adding the pack with its inno\u00adva\u00adti\u00adve approach, desig\u00adning this <span class=\"caps\">APA<\/span> sys\u00adtem with the fle\u00adxi\u00adbi\u00adli\u00adty to adapt the spe\u00adci\u00adfi\u00adca\u00adti\u00adons depen\u00adding on the spe\u00adci\u00adfic requi\u00adre\u00adments of dif\u00adfe\u00adrent auto\u00adma\u00adkers. This is a per\u00adfect exam\u00adp\u00adle of how the adap\u00adta\u00adbi\u00adli\u00adty of the <span class=\"caps\">AMD<\/span> Zynq MPSoC pro\u00advi\u00addes an upgrade path to increased fea\u00adture capa\u00adbi\u00adli\u00adty in future designs.\u201d<\/p>\n<p><strong><span class=\"caps\">AMD<\/span> in Automotive<\/strong><\/p>\n<p>As the pace of inno\u00adva\u00adti\u00adon con\u00adti\u00adnues&nbsp;to acce\u00adle\u00adra\u00adte in the auto\u00admo\u00adti\u00adve indus\u00adtry, the need&nbsp;for high-per\u00adfor\u00admance&nbsp;com\u00adpu\u00adte, acce\u00adle\u00adra\u00adtors and gra\u00adphics tech\u00adno\u00adlo\u00adgies is&nbsp;incre\u00adasing. <span class=\"caps\">AMD<\/span> is at the fore\u00adfront of this inflec\u00adtion point, with the industry\u2019s broa\u00addest line of high-per\u00adfor\u00admance&nbsp;CPUs, GPUs, FPGAs&nbsp;and adap\u00adti\u00adve SoCs. From powe\u00adring in-vehic\u00adle info\u00adtain\u00adment sys\u00adtems to advan\u00adced dri\u00adver-assis\u00adtance sys\u00adtems, auto\u00adno\u00admous dri\u00adving and net\u00adwor\u00adking appli\u00adca\u00adti\u00adons whe\u00adre func\u00adtion\u00adal safe\u00adty is of para\u00admount importance, <span class=\"caps\">AMD<\/span> pro\u00advi\u00addes car\u00adma\u00adkers with a one-stop shop for sili\u00adcon and soft\u00adware solu\u00adti\u00adons. Visit&nbsp;<a href=\"https:\/\/www.xilinx.com\/applications\/automotive.html\" target=\"_blank\" rel=\"nofollow noopener\">here<\/a>&nbsp;for more information.<\/p>\n<p><strong>Sup\u00adport\u00ading Resources<\/strong><\/p>\n<ul type=\"disc\">\n<li>Learn more about the&nbsp;<a href=\"https:\/\/www.xilinx.com\/products\/silicon-devices\/soc\/zynq-ultrascale-mpsoc.html\" target=\"_blank\" rel=\"nofollow noopener\">Zynq UltraS\u00adca\u00adle+ MPSoC pro\u00adduct family<\/a><\/li>\n<\/ul>\n<p><strong>About <span class=\"caps\">AMD<\/span><\/strong><\/p>\n<p>For more than 50 years <span class=\"caps\">AMD<\/span> has dri\u00adven inno\u00adva\u00adti\u00adon in high-per\u00adfor\u00admance com\u00adpu\u00adting, gra\u00adphics and visua\u00adliza\u00adti\u00adon tech\u00adno\u00adlo\u00adgies. Bil\u00adli\u00adons of peo\u00adp\u00adle, lea\u00adding For\u00adtu\u00adne 500 busi\u00adnesses and cut\u00adting-edge sci\u00aden\u00adti\u00adfic rese\u00adarch insti\u00adtu\u00adti\u00adons around the world rely on <span class=\"caps\">AMD<\/span> tech\u00adno\u00adlo\u00adgy dai\u00adly to impro\u00adve how they live, work and play. <span class=\"caps\">AMD<\/span> employees are focu\u00adsed on buil\u00adding lea\u00adder\u00adship high-per\u00adfor\u00admance and adap\u00adti\u00adve pro\u00adducts that push the boun\u00adda\u00adries of what is pos\u00adsi\u00adble. For more infor\u00adma\u00adti\u00adon about how <span class=\"caps\">AMD<\/span> is enab\u00adling today and inspi\u00adring tomor\u00adrow, visit the <span class=\"caps\">AMD<\/span> (<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>)&nbsp;<a href=\"https:\/\/www.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\">web\u00adsite<\/a>,&nbsp;<a href=\"https:\/\/community.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\">blog<\/a>,&nbsp;<a href=\"https:\/\/www.linkedin.com\/company\/amd\" target=\"_blank\" rel=\"nofollow noopener\">Lin\u00adke\u00addIn<\/a>&nbsp;and&nbsp;<a href=\"https:\/\/twitter.com\/AMD\" target=\"_blank\" rel=\"nofollow noopener\">Twit\u00adter<\/a>&nbsp;pages.&nbsp;<\/p>\n<p align=\"left\"><strong>Cont\u00adact:<\/strong><br>\n<strong>David Sza\u00adba\u00addos<\/strong><br>\n<span class=\"caps\">AMD<\/span> Communications<br>\n(408) 472\u20112439<br>\n<a href=\"mailto:david.szabados@amd.com\" target=\"_blank\" rel=\"nofollow noopener\">david.szabados@amd.com<\/a><\/p>\n<p align=\"left\"><strong>Suresh Bhas\u00adka\u00adran<\/strong><br>\n<span class=\"caps\">AMD<\/span> Inves\u00adtor Relations<br>\n(408) 749\u20112845<br>\n<a href=\"mailto:Suresh.bhaskaran@amd.com\" target=\"_blank\" rel=\"nofollow noopener\">Suresh.bhaskaran@amd.com<\/a><\/p>\n<p><strong><span class=\"caps\">AMD<\/span>, the <span class=\"caps\">AMD<\/span> Arrow logo, Zynq UltraS\u00adca\u00adle+, and com\u00adbi\u00adna\u00adti\u00adons the\u00adreof are trade\u00admarks of Advan\u00adced Micro Devices, Inc. Other names are for infor\u00adma\u00adtio\u00adnal pur\u00adpo\u00adses only and may be trade\u00admarks of their respec\u00adti\u00adve owners.<\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"<p><\/p><h3>\u2500\u2500 <span class=\"caps\">AMD<\/span> Zynq UltraScale+ MPSoC automotive platform with deep learning processor advances low-latency, AI-based image processing for automated parking system&nbsp;\u2500\u2500<\/h3>\n<p align=\"left\"><span class=\"caps\">SANTA<\/span> <span class=\"caps\">CLARA<\/span>, Calif., Nov. 16, 2022 (<span class=\"caps\">GLOBE<\/span> <span class=\"caps\">NEWSWIRE<\/span>) \u2014&nbsp;<a href=\"http:\/\/www.amd.com\/\" target=\"_blank\" rel=\"nofollow noopener\"><span class=\"caps\">AMD<\/span><\/a>&nbsp;(<span class=\"caps\">NASDAQ<\/span>: <span class=\"caps\">AMD<\/span>) announ\u00adced today that the <span class=\"caps\">AMD<\/span> Xilinx Auto\u00admo\u00adti\u00adve (<span class=\"caps\">XA<\/span>) Zynq<sup><em>\u00ae<\/em><\/sup>&nbsp;UltraS\u00adca\u00adle+<sup><em>\u2122<\/em><\/sup>&nbsp;MPSoC plat\u00adform has been sel\u00adec\u00adted to power the Aisin Auto\u00adma\u00adted Par\u00adking-Assist (<span class=\"caps\">APA<\/span>) sys\u00adtem. The high\u00adly adap\u00adta\u00adble <span class=\"caps\">XA<\/span> Zynq UltraS\u00adca\u00adle+ MPSoC plat\u00adform enables the next-gene\u00adra\u00adti\u00adon Aisin <span class=\"caps\">APA<\/span> sys\u00adtem to detect pede\u00adstri\u00adans, vehic\u00adles and free space effi\u00adci\u00adent\u00adly and at extre\u00adme\u00adly low laten\u00adcy. The Aisin <span class=\"caps\">APA<\/span> sys\u00adtem will begin ship\u00adping in model year&nbsp;2024.<\/p>\n<p>The <span class=\"caps\">XA<\/span> Zynq UltraS\u00adca\u00adle+ MPSoC plat\u00adform \u2014 deploy\u00aded in the came\u00adras within the Aisin <span class=\"caps\">APA<\/span> sys\u00adtem \u2014 com\u00adbi\u00adnes a high-per\u00adfor\u00admance Arm<sup>\u00ae<\/sup>-based mul\u00adti\u00adco\u00adre, mul\u00adtipro\u00adces\u00adsing sys\u00adtem with ASIC-class pro\u00adgramma\u00adble logic con\u00adtai\u00adning cus\u00adtom co-pro\u00adces\u00adsors that can be opti\u00admi\u00adzed to meet sys\u00adtem needs, inclu\u00adding a deep lear\u00adning pro\u00adces\u00adsor unit for con\u00advo\u00adlu\u00adtio\u00adnal neu\u00adral net\u00adwork (<span class=\"caps\">CNN<\/span>) pro\u00adces\u00adsing. This enables machi\u00adne lear\u00adning-based sce\u00adne seg\u00admen\u00adta\u00adti\u00adon and object detec\u00adtion for the Aisin <span class=\"caps\">APA<\/span> sys\u00adtem. The <span class=\"caps\">XA<\/span> Zynq MPSoC plat\u00adform deli\u00advers maxi\u00admum pro\u00adces\u00adsing effi\u00adci\u00aden\u00adcy and is capa\u00adble of off\u00adloa\u00adding cri\u00adti\u00adcal func\u00adtions, such as gra\u00adphics and video pipe\u00adlining, to dedi\u00adca\u00adted pro\u00adces\u00adsing blocks to enable low-laten\u00adcy image processing.<br>\n (\u2026) <a class=\"moretag\" href=\"https:\/\/www.planet3dnow.de\/cms\/67034-amd-powers-aisin-next-generation-automated-parking-assist-system\/\">Wei\u00adter\u00adle\u00adsen&nbsp;\u00bb<\/a><\/p>\n","protected":false},"author":593,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[22],"tags":[966,2788,1583,2632],"class_list":["post-67034","post","type-post","status-publish","format-standard","hentry","category-pressemitteilungen","tag-amd","tag-automotive","tag-xilinx","tag-zynq-ultrascale","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/67034","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/593"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=67034"}],"version-history":[{"count":1,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/67034\/revisions"}],"predecessor-version":[{"id":67035,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/67034\/revisions\/67035"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=67034"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=67034"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=67034"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}