{"id":7721,"date":"2014-01-28T20:51:53","date_gmt":"2014-01-28T19:51:53","guid":{"rendered":"http:\/\/www.planet3dnow.de\/cms\/?p=7721"},"modified":"2014-01-29T13:12:27","modified_gmt":"2014-01-29T12:12:27","slug":"amd-verspricht-seattle-samples-fuer-maerz","status":"publish","type":"post","link":"https:\/\/www.planet3dnow.de\/cms\/7721-amd-verspricht-seattle-samples-fuer-maerz\/","title":{"rendered":"<span class=\"caps\">OCP<\/span> Summit V: <span class=\"caps\">AMD<\/span> verspricht Seattle-Samples f\u00fcr&nbsp;M\u00e4rz"},"content":{"rendered":"<p>Auf dem heu\u00adte und mor\u00adgen statt\u00adfin\u00adden\u00adden Open-Com\u00adpu\u00adte-Tref\u00adfen gab AMDs Ser\u00adver\u00adma\u00adna\u00adger und ehe\u00adma\u00adli\u00adger <span class=\"caps\">CEO<\/span> von Sea\u00adMi\u00adcro Andrew Feld\u00adman ein paar Details zum kom\u00admen\u00adden <a title=\"AMD aktualisiert Opteron-Roadmap bis 2014 - Berlin, Warsaw und Seattle sollen es richten [Update]\" href=\"http:\/\/www.planet3dnow.de\/cms\/6543-amd-opteron-roadmap-2014-berlin-apu-warsaw-cpu-seattle-arm\/\">ARM-Ser\u00adver-SoC mit dem Code\u00adna\u00admen \u201cSeat\u00adtle\u201d<\/a> bekannt, wel\u00adcher auf der 64-Bit-Archi\u00adtek\u00adtur ARMv8 basiert. Die tech\u00adni\u00adschen Daten wur\u00adden zwar schon letz\u00adtes Jahr ver\u00f6ffentlicht:<\/p>\n<p style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter\" alt src=\"http:\/\/www.planet3dnow.de\/photoplog\/images\/54308\/1_35-Opteron-Roadmap-2014.png\" width=\"768\" height=\"432\"><\/p>\n<p>Jedoch wur\u00adden nun Samples mit acht ARM-Cor\u00adtex-A57-Ker\u00adnen f\u00fcr M\u00e4rz ver\u00adspro\u00adchen und fer\u00adti\u00adge Kar\u00adten gezeigt. Die auf der alten, obi\u00adgen Folie genann\u00adte 16-Kern-Ver\u00adsi\u00adon wur\u00adde nicht erw\u00e4hnt. \u201cSeat\u00adtle\u201d wird den Mar\u00adken\u00adna\u00admen \u201c<span class=\"caps\">AMD<\/span> Opte\u00adron <span class=\"caps\">A1100<\/span>\u201d bekom\u00admen, im 2. Halb\u00adjahr erschei\u00adnen und \u00fcber bis zu 4 MiB <span class=\"caps\">L2<\/span> und 8 MiB <span class=\"caps\">L3<\/span> Cache ver\u00adf\u00fc\u00adgen. Bei\u00adde Cache\u00adebe\u00adnen wer\u00adden gemein\u00adsam genutzt. Der inte\u00adgrier\u00adte Spei\u00adcher\u00adcon\u00adtrol\u00adler unter\u00adst\u00fctzt sowohl ECC-gesch\u00fctz\u00adten <span class=\"caps\">DDR3<\/span> als auch <span class=\"caps\">DDR4<\/span> regis\u00adtered oder unbuf\u00adfe\u00adr\u00aded. \u00dcber bis zu vier Slots k\u00f6n\u00adnen die DIMMs mit einer maxi\u00adma\u00adlen Trans\u00adfer\u00adra\u00adte von 1866 <span class=\"caps\">MT<\/span>\/s ange\u00adsteu\u00adert werden.<\/p>\n<p><span class=\"dquo\">\u201c<\/span>Seat\u00adtle\u201d ist AMDs ers\u00adtes Sys\u00adtem-on-a-Chip (SoC), wel\u00adches auf ARM-Tech\u00adno\u00adlo\u00adgie basiert. Allein\u00adstel\u00adlungs\u00admerk\u00admal AMDs ist dabei die \u00fcber PCIe arbei\u00adten\u00adde, \u201cFree\u00addom Fabric\u201d getauf\u00adte Ver\u00adbin\u00addungs\u00adlo\u00adgik, die es erm\u00f6g\u00adlicht, den I\/O\u2011Verkehr zu Daten\u00adtr\u00e4\u00adgern oder Netz\u00adwerk gemein\u00adsam zu benut\u00adzen und dadurch aus\u00adzu\u00adla\u00adgern. Mit\u00adbe\u00adwer\u00adber\u00adl\u00f6\u00adsun\u00adgen ben\u00f6\u00adti\u00adgen dage\u00adgen auf jeder SoC-Kar\u00adte einen eige\u00adnen Netz\u00adwerk- und\/oder SATA-Anschluss. Hier\u00adzu bie\u00adtet der SoC ins\u00adge\u00adsamt acht PCIe\u20113.0\u2011Lanes, die ent\u00adwe\u00adder als zwei x4- oder eine x8-Kon\u00adfi\u00adgu\u00adra\u00adti\u00adon ver\u00adwen\u00addet wer\u00adden k\u00f6n\u00adnen. Zudem ste\u00adhen zwei 10-Gbi\u00adt\/s\u2011E\u00adther\u00adnet- sowie acht SATA-6Gb\/s\u2011\u00adPorts zur Verf\u00fcgung.<\/p>\n<p>Zus\u00e4tz\u00adlich zum Chip pr\u00e4\u00adsen\u00adtier\u00adte <span class=\"caps\">AMD<\/span> auch ein neu\u00ades SoC-Steck\u00adkar\u00adten\u00adfor\u00admat f\u00fcr Open-Com\u00adpu\u00adte-Ser\u00adver und ver\u00adsprach die Spe\u00adzi\u00adfi\u00adka\u00adti\u00adon des Slots der Open-Com\u00adpu\u00adte-Bewe\u00adgung zur Ver\u00adf\u00fc\u00adgung zu stellen:<\/p>\n<p style=\"text-align: center;\">ngg_shortcode_0_placeholder<\/p>\n<p>Ob dadurch ein Aus\u00adein\u00adan\u00adder\u00addrif\u00adten des Mark\u00adtes wie z.B. zu Slot-A- und Slot-1-Zei\u00adten ver\u00adhin\u00addert wer\u00adden kann, wird sich zei\u00adgen m\u00fcs\u00adsen. Schlie\u00df\u00adlich arbei\u00adten Mit\u00adbe\u00adwer\u00adber schon l\u00e4n\u00adger an eige\u00adnen Designs.<\/p>\n<p>Als Ent\u00adwick\u00adler\u00adplatt\u00adform offe\u00adriert <span class=\"caps\">AMD<\/span> ein \u00b5ATX-Board mit acht PCIe\u20113.0\u2011Leitungen, Regis\u00adtered-DIMM-Slots f\u00fcr max. 128 GiB <span class=\"caps\">RAM<\/span> und acht SATA-3-Anschl\u00fcssen.<\/p>\n<p style=\"text-align: center;\">ngg_shortcode_1_placeholder<\/p>\n<p style=\"text-align: center;\"><span style=\"font-size: x-small;\">Bild\u00adquel\u00adle: <a href=\"https:\/\/twitter.com\/AMDServer\/status\/428255751992512512\" target=\"_blank\"><span class=\"caps\">AMD<\/span><\/a><\/span><\/p>\n<p><strong>Quel\u00adle:<\/strong> <a title=\"AMD to Accelerate the ARM Server Ecosystem With the First ARM-Based CPU and Development Platform From a Server Processor Vendor\" href=\"http:\/\/www.planet3dnow.de\/cms\/7756-amd-to-accelerate-the-arm-server-ecosystem-with-the-first-arm-based-cpu-and-development-platform-from-a-server-processor-vendor\/\">Pres\u00adse\u00admit\u00adtei\u00adlung<\/a><\/p>\n<!--nextpage-->\nngg_shortcode_2_placeholder&nbsp;","protected":false},"excerpt":{"rendered":"<p>Auf dem heu\u00adte und mor\u00adgen statt\u00adfin\u00adden\u00adden Open-Com\u00adpu\u00adte-Tref\u00adfen gab AMDs Ser\u00adver\u00adma\u00adna\u00adger und ehe\u00adma\u00adli\u00adger <span class=\"caps\">CEO<\/span> von Sea\u00admi\u00adcro Andrew Feld\u00adman ein paar Details zum kom\u00admen\u00adden ARM-Ser\u00adver-SoC mit dem Code\u00adna\u00admen \u201cSeat\u00adtle\u201d bekannt, (\u2026) <a class=\"moretag\" href=\"https:\/\/www.planet3dnow.de\/cms\/7721-amd-verspricht-seattle-samples-fuer-maerz\/\">Wei\u00adter\u00adle\u00adsen&nbsp;\u00bb<\/a><\/p>\n","protected":false},"author":5,"featured_media":6190,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"wp_typography_post_enhancements_disabled":false,"ngg_post_thumbnail":0,"footnotes":""},"categories":[12,11],"tags":[966,1010,311,516,515,1008,352,304,351],"class_list":["post-7721","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-aktuelles","category-news","tag-amd","tag-arm","tag-armv8","tag-cortex-a57","tag-ocp","tag-opteron","tag-seamicro","tag-seattle","tag-server","entry"],"share_on_mastodon":{"url":"","error":""},"_links":{"self":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/7721","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/comments?post=7721"}],"version-history":[{"count":25,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/7721\/revisions"}],"predecessor-version":[{"id":7773,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/posts\/7721\/revisions\/7773"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media\/6190"}],"wp:attachment":[{"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/media?parent=7721"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/categories?post=7721"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.planet3dnow.de\/cms\/wp-json\/wp\/v2\/tags?post=7721"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}