Auf dem International Electron Devices Meeting 2006 vom 11. bis zum 13. Dezember in San Francisco werden IBM, AMD und deren Partner in verschiedenen Präsentationen Details zum 45nm-Fertigungsprozess zeigen.
IBM Systems and Technology Group, Advanced Micro Devices, Inc., Sony Electronics, Inc., Toshiba America Electronic Components, Inc., Infineon Technologies, AG, Samsung Electronics Co., Ltd., Chartered Semiconductor Mfg., Ltd., IBM SRDC, Hopewell Junction, NY
A high performance 45 nm BEOL technology is presented. A ULK SiCOH film was developed to have superior integration performance and mechanical properties. Reliability of wiring in both low-k and ULK levels are proven and fundamental solutions are implemented which enable successful ULK Chip-Package Interaction (CPI) reliability
Wednesday, December 13, Grand Ballroom B
27.3 High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography
We present a 45-nm SOI CMOS technology that features: i) aggressive ground-rule (GR) scaling enabled by 1.2NA/193nm immersion lithography, ii) high-performance FET response enabled by the integration of multiple advanced strain, iii) a functional SRAM with cell size of 0.37μm2, and iv) a porous low-k (k=2.4) back-end dielectric. The list of FET-specific performance elements includes enhanced dual-stress liner, advanced eSiGe, stress memorization, and advanced anneal. The resulting PFET/NFET Idsat values, at Vdd of 1.0V and 45nm GR gate pitch, are 840μA/mm/1240μA/μm respectively. The global wiring delay achieved with k=2.4 reflects a 20% reduction compared to k=3.0.
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