Differences Between VEGA and Previous Devices
Summary of kernel instruction changes in Vega GPUs:
• New packed 16-bit math instructions.
V_PK_MAD_I16 V_PK_MUL_LO_U16 V_PK_ADD_I16 V_PK_SUB_I16
V_PK_LSHLREV_B16 V_PK_LSHRREV_B16 V_PK_ASHRREV_I16 V_PK_MAX_I16
V_PK_MIN_I16 V_PK_MAD_U16 V_PK_ADD_U16 V_PK_SUB_U16
V_PK_MAX_U16 V_PK_MIN_U16 V_PK_FMA_F16 V_PK_ADD_F16
V_PK_MUL_F16 V_PK_MIN_F16 V_PK_MAX_F16 V_MAD_MIX_F32
V_MAD_MIXLO_F16 V_MAD_MIXHI_F16 S_PACK_{LL,LH,HH}_B16_B32
•
TMA and TBA registers are stored one per VM-ID, not per draw or dispatch.
• Added Image operations support 16-bit address and data.
• Added Global and Scratch memory read/write operations.
• Also added Scratch load/store to scalar memory.
• Added Scalar memory atomic instructions.
•
MIMG Microcode format: removed the R128 bit.
• FLAT Microcode format: added an offset field.
•
Removed V_MOVEREL instructions.
• Added control over arithmetic overflow for FP16 VALU operations.
•
Modified bit packing of surface descriptors and samplers:
• T#: removed heap, elem_size, last_array, interlaced, uservm_mode bits.
• V#: removed mtype.
• S#: removed astc_hdr field.