— Next-gene­ra­ti­on AMD EPYC CPU, code­na­med “Venice,” is the first HPC pro­duct to be brought up on TSMC’s next-gene­ra­ti­on N2 node —

SANTA CLARA, Calif., April 14, 2025 (GLOBE NEWSWIRE) — AMD (NASDAQ: AMD) today announ­ced its next-gene­ra­ti­on AMD EPYC™ pro­ces­sor, code­na­med “Venice,” is the first HPC pro­duct in the indus­try to be taped out and brought up on the TSMC advan­ced 2nm (N2) pro­cess tech­no­lo­gy. This high­lights the strength of AMD and TSMC semi­con­duc­tor manu­fac­tu­ring part­ner­ship to co-opti­mi­ze new design archi­tec­tures with lea­ding-edge pro­cess tech­no­lo­gy. It also marks a major step for­ward in the exe­cu­ti­on of the AMD data cen­ter CPU road­map, with “Venice” on track to launch next year. AMD also announ­ced the suc­cessful bring up and vali­da­ti­on of its 5^th Gen AMD EPYC™ CPU pro­ducts at TSMC’s new fabri­ca­ti­on faci­li­ty in Ari­zo­na, unders­coring its com­mit­ment to U.S. manufacturing.

“TSMC has been a key part­ner for many years and our deep col­la­bo­ra­ti­on with their R&D and manu­fac­tu­ring teams has enab­led AMD to con­sis­t­ent­ly deli­ver lea­der­ship pro­ducts that push the limits of high-per­for­mance com­pu­ting,” said Dr. Lisa Su, chair and CEO, AMD. “Being a lead HPC cus­to­mer for TSMC’s N2 pro­cess and for TSMC Ari­zo­na Fab 21 are gre­at examp­les of how we are working clo­se­ly tog­e­ther to dri­ve inno­va­ti­on and deli­ver the advan­ced tech­no­lo­gies that will power the future of computing.”

“We are proud to have AMD be a lead HPC cus­to­mer for our advan­ced 2nm (N2) pro­cess tech­no­lo­gy and TSMC Ari­zo­na fab,” said TSMC Chair­man and CEO Dr. C.C. Wei. “By working tog­e­ther, we are dri­ving signi­fi­cant tech­no­lo­gy sca­ling resul­ting in bet­ter per­for­mance, power effi­ci­en­cy and yields for high-per­for­mance sili­con. We look for­ward to con­ti­nuing to work clo­se­ly with AMD to enable the next era of computing.”

Sup­port­ing Resources

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About AMD
For more than 50 years AMD has dri­ven inno­va­ti­on in high-per­for­mance com­pu­ting, gra­phics and visua­liza­ti­on tech­no­lo­gies. Bil­li­ons of peo­p­le, lea­ding For­tu­ne 500 busi­nesses and cut­ting-edge sci­en­ti­fic rese­arch insti­tu­ti­ons around the world rely on AMD tech­no­lo­gy dai­ly to impro­ve how they live, work and play. AMD employees are focu­sed on buil­ding lea­der­ship high-per­for­mance and adap­ti­ve pro­ducts that push the boun­da­ries of what is pos­si­ble. For more infor­ma­ti­on about how AMD is enab­ling today and inspi­ring tomor­row, visit the AMD (NASDAQ: AMD) web­site, blog, Lin­ke­dIn and X pages. 

Cau­tio­na­ry Statement 
This press release con­ta­ins for­ward-loo­king state­ments con­cer­ning Advan­ced Micro Devices, Inc. (AMD) such as AMD’s part­ner­ship with TSMC; next-gene­ra­ti­on AMD EPYC™ pro­ces­sors to be taped out and brought up on the TSMC advan­ced 2nm pro­cess tech­no­lo­gy and being on track to launch next year; AMD’s data cen­ter CPU road­map; and 5th Gen AMD EPYC™ CPU pro­ducts being plan­ned for ship­ment later this year, which are made pur­su­ant to the Safe Har­bor pro­vi­si­ons of the Pri­va­te Secu­ri­ties Liti­ga­ti­on Reform Act of 1995. For­ward-loo­king state­ments are com­mon­ly iden­ti­fied by words such as “would,” “may,” “expects,” “belie­ves,” “plans,” “intends,” “pro­jects” and other terms with simi­lar mea­ning. Inves­tors are cau­tio­ned that the for­ward-loo­king state­ments in this press release are based on cur­rent beliefs, assump­ti­ons and expec­ta­ti­ons, speak only as of the date of this press release and invol­ve risks and uncer­tain­ties that could cau­se actu­al results to dif­fer mate­ri­al­ly from cur­rent expec­ta­ti­ons. Such state­ments are sub­ject to cer­tain known and unknown risks and uncer­tain­ties, many of which are dif­fi­cult to pre­dict and gene­ral­ly bey­ond AMD’s con­trol, that could cau­se actu­al results and other future events to dif­fer mate­ri­al­ly from tho­se expres­sed in, or impli­ed or pro­jec­ted by, the for­ward-loo­king infor­ma­ti­on and state­ments. Mate­ri­al fac­tors that could cau­se actu­al results to dif­fer mate­ri­al­ly from cur­rent expec­ta­ti­ons include, wit­hout limi­ta­ti­on, the fol­lo­wing: Intel Corporation’s domi­nan­ce of the micro­pro­ces­sor mar­ket and its aggres­si­ve busi­ness prac­ti­ces; Nvidia’s domi­nan­ce in the gra­phics pro­ces­sing unit mar­ket and its aggres­si­ve busi­ness prac­ti­ces; com­pe­ti­ti­ve mar­kets in which AMD’s pro­ducts are sold; the cycli­cal natu­re of the semi­con­duc­tor indus­try; mar­ket con­di­ti­ons of the indus­tries in which AMD pro­ducts are sold; AMD’s abili­ty to intro­du­ce pro­ducts on a time­ly basis with expec­ted fea­tures and per­for­mance levels; loss of a signi­fi­cant cus­to­mer; eco­no­mic and mar­ket uncer­tain­ty; quar­ter­ly and sea­so­nal sales pat­terns; AMD’s abili­ty to ade­qua­te­ly pro­tect its tech­no­lo­gy or other intellec­tu­al pro­per­ty; unfa­vorable cur­ren­cy exch­an­ge rate fluc­tua­tions; abili­ty of third par­ty manu­fac­tu­r­ers to manu­fac­tu­re AMD’s pro­ducts on a time­ly basis in suf­fi­ci­ent quan­ti­ties and using com­pe­ti­ti­ve tech­no­lo­gies; avai­la­bi­li­ty of essen­ti­al equip­ment, mate­ri­als, sub­stra­tes or manu­fac­tu­ring pro­ces­ses; abili­ty to achie­ve expec­ted manu­fac­tu­ring yields for AMD’s pro­ducts; AMD’s abili­ty to gene­ra­te reve­nue from its semi-cus­tom SoC pro­ducts; poten­ti­al secu­ri­ty vul­nerabi­li­ties; poten­ti­al secu­ri­ty inci­dents inclu­ding IT outa­ges, data loss, data brea­ches and cyber­at­tacks; uncer­tain­ties invol­ving the orde­ring and ship­ment of AMD’s pro­ducts; AMD’s reli­ance on third-par­ty intellec­tu­al pro­per­ty to design and intro­du­ce new pro­ducts; AMD’s reli­ance on third-par­ty com­pa­nies for design, manu­fac­tu­re and sup­p­ly of mother­boards, soft­ware, memo­ry and other com­pu­ter plat­form com­pon­ents; AMD’s reli­ance on Micro­soft and other soft­ware ven­dors’ sup­port to design and deve­lop soft­ware to run on AMD’s pro­ducts; AMD’s reli­ance on third-par­ty dis­tri­bu­tors and add-in-board part­ners; impact of modi­fi­ca­ti­on or inter­rup­ti­on of AMD’s inter­nal busi­ness pro­ces­ses and infor­ma­ti­on sys­tems; com­pa­ti­bi­li­ty of AMD’s pro­ducts with some or all indus­try-stan­dard soft­ware and hard­ware; cos­ts rela­ted to defec­ti­ve pro­ducts; effi­ci­en­cy of AMD’s sup­p­ly chain; AMD’s abili­ty to rely on third par­ty sup­p­ly-chain logi­stics func­tions; AMD’s abili­ty to effec­tively con­trol sales of its pro­ducts on the gray mar­ket; long-term impact of cli­ma­te chan­ge on AMD’s busi­ness; impact of govern­ment actions and regu­la­ti­ons such as export regu­la­ti­ons, tariffs and trade pro­tec­tion mea­su­res; AMD’s abili­ty to rea­li­ze its defer­red tax assets; poten­ti­al tax lia­bi­li­ties; cur­rent and future claims and liti­ga­ti­on; impact of envi­ron­men­tal laws, con­flict mine­rals rela­ted pro­vi­si­ons and other laws or regu­la­ti­ons; evol­ving expec­ta­ti­ons from govern­ments, inves­tors, cus­to­mers and other stake­hol­ders regar­ding cor­po­ra­te respon­si­bi­li­ty mat­ters; issues rela­ted to the respon­si­ble use of AI; rest­ric­tions impo­sed by agree­ments gover­ning AMD’s notes, the gua­ran­tees of Xilinx’s notes and the revol­ving cre­dit agree­ment; impact of acqui­si­ti­ons, joint ven­tures and/or stra­te­gic invest­ments on AMD’s busi­ness and AMD’s abili­ty to inte­gra­te acqui­red busi­nesses, such as ZT Sys­tems; impact of any impair­ment of the com­bi­ned company’s assets; poli­ti­cal, legal and eco­no­mic risks and natu­ral dis­as­ters; future impairm­ents of tech­no­lo­gy licen­se purcha­ses; AMD’s abili­ty to attract and retain qua­li­fied per­son­nel; and AMD’s stock pri­ce vola­ti­li­ty. Inves­tors are urged to review in detail the risks and uncer­tain­ties in AMD’s Secu­ri­ties and Exch­an­ge Com­mis­si­on filings, inclu­ding but not limi­t­ed to AMD’s most recent reports on Forms 10‑K and 10‑Q.

AMD, the AMD Arrow logo, EPYC and com­bi­na­ti­ons the­reof, are trade­marks of Advan­ced Micro Devices, Inc. Other names are for infor­ma­tio­nal pur­po­ses only and may be trade­marks of their respec­ti­ve owners.