Xilinx Expands Alveo Portfolio with Industry셲 First Adaptable Compute, Network and Storage Accelerator Card Built for Any Server, Any Cloud

First low-pro짯fi짯le PCIe Gen 4 card deli짯vers dra짯ma짯tic impro짯ve짯ments in through짯put, laten짯cy and power effi짯ci짯en짯cy for cri짯ti짯cal data cen짯ter workloads

SAN JOSE, Calif.Aug. 6, 2019 /PRNewswire/  Xilinx, Inc. (NASDAQ: XLNX), the lea짯der in adap짯ti짯ve and intel짯li짯gent com짯pu짯ting, today expan짯ded its Alveo data cen짯ter acce짯le짯ra짯tor card port짯fo짯lio with the launch of the Alveo U50. The U50 card is the industry셲 first low pro짯fi짯le adap짯ta짯ble acce짯le짯ra짯tor with PCIe Gen 4 sup짯port, uni짯que짯ly desi짯gned to super짯char짯ge a broad ran짯ge of cri짯ti짯cal com짯pu짯te, net짯work and sto짯rage workloads, all on one recon짯fi짯gura짯ble platform.

 

Alveo U50 Data Cen짯ter Acce짯le짯ra짯tor Card (PRNewsfoto/Xilinx, Inc.)

The Alveo U50 pro짯vi짯des cus짯to짯mers with a pro짯gramma짯ble low pro짯fi짯le and low-power acce짯le짯ra짯tor plat짯form built for sca짯le-out archi짯tec짯tures and domain-spe짯ci짯fic acce짯le짯ra짯ti짯on of any ser짯ver deploy짯ment, on-pre짯mi짯se, in the cloud and at the edge. To meet the chal짯lenges of emer짯ging dyna짯mic workloads such as cloud micro짯ser짯vices, Alveo U50 deli짯vers bet짯ween 1020x impro짯ve짯ments in through짯put, laten짯cy and power effi짯ci짯en짯cy. For acce짯le짯ra짯ted net짯wor짯king and sto짯rage workloads, the U50 card helps deve짯lo짯pers iden짯ti짯fy and eli짯mi짯na짯te laten짯cy and data move짯ment bot짯t짯len짯ecks by moving com짯pu짯te clo짯ser to the data.

Powered by the Xilinx UltraS짯ca짯le+꽓 archi짯tec짯tu짯re, the Alveo U50 card is the first in the Alveo port짯fo짯lio to be packa짯ged in a half-height, half-length form fac짯tor and low 75-Watt power enve짯lo짯pe. The card fea짯tures high-band짯width memo짯ry (HBM2), 100 giga짯bit per second (100 Gbps) net짯wor짯king con짯nec짯ti짯vi짯ty, and sup짯port for the PCIe Gen 4 and CCIX inter짯con짯nects. By fit짯ting into stan짯dard PCIe ser짯ver slots and using one-third the power, the Alveo U50 signi짯fi짯cant짯ly expands the scope in which adap짯ta짯ble acce짯le짯ra짯ti짯on can be deploy짯ed to unlock dra짯ma짯tic through짯put and laten짯cy impro짯ve짯ments for deman짯ding com짯pu짯te, net짯work and sto짯rage workloads. The 8GB of HBM2 deli짯vers over 400 Gbps data trans짯fer speeds and the QSFP ports pro짯vi짯de up to 100 Gbps net짯work con짯nec짯ti짯vi짯ty. The high-speed net짯wor짯king I/O also sup짯ports advan짯ced appli짯ca짯ti짯ons like NVMe-oF꽓 solu짯ti짯ons (NVM Express over Fabrics꽓), dis짯ag짯gre짯ga짯ted com짯pu짯ta짯tio짯nal sto짯rage and spe짯cia짯li짯zed finan짯cial ser짯vices applications. 

From machi짯ne lear짯ning infe짯rence, video trans짯co짯ding and data ana짯ly짯tics to com짯pu짯ta짯tio짯nal sto짯rage, elec짯tro짯nic tra짯ding and finan짯cial risk mode짯ling, the Alveo U50 brings pro짯gramma짯bi짯li짯ty, fle짯xi짯bi짯li짯ty, and high through짯put and low laten짯cy per짯for짯mance advan짯ta짯ges to any ser짯ver deploy짯ment. Unli짯ke fixed archi짯tec짯tu짯re alter짯na짯ti짯ves, the soft짯ware and hard짯ware pro짯gramma짯bi짯li짯ty of the Alveo U50 allows cus짯to짯mers to meet ever-chan짯ging demands and opti짯mi짯ze appli짯ca짯ti짯on per짯for짯mance as workloads and algo짯rith짯ms con짯ti짯nue to evolve. 

Alveo U50 acce짯le짯ra짯ted solu짯ti짯ons deli짯ver signi짯fi짯cant cus짯to짯mer value across a ran짯ge of appli짯ca짯ti짯ons, including:

  • Deep lear짯ning infe짯rence acce짯le짯ra짯ti짯on (speech trans짯la짯ti짯on): deli짯vers up to 25x lower laten짯cy, 10x hig짯her through짯put and signi짯fi짯cant짯ly impro짯ved power effi짯ci짯en짯cy per node com짯pared to GPU-only for speech trans짯la짯ti짯on per짯for짯mance1;
  • Data ana짯ly짯tics acce짯le짯ra짯ti짯on (data짯ba짯se query): run짯ning the TPC멖 Query bench짯mark, Alveo U50 deli짯vers 4x hig짯her through짯put per hour and redu짯ced ope짯ra짯tio짯nal cos짯ts by 3x com짯pared to in-memo짯ry CPU2;
  • Com짯pu짯ta짯tio짯nal sto짯rage acce짯le짯ra짯ti짯on (com짯pres짯si짯on): deli짯vers 20x more compression/decompression through짯put, fas짯ter Hadoop and big data ana짯ly짯tics, and over 30 per짯cent lower cost per node com짯pared to CPU-only nodes3;
  • Net짯work acce짯le짯ra짯ti짯on (elec짯tro짯nic tra짯ding): deli짯vers 20x lower laten짯cy and sub-500ns tra짯ding time com짯pared to CPU-only laten짯cy of 10us4;
  • Finan짯cial mode짯ling (grid com짯pu짯ting): run짯ning the Mon짯te Car짯lo simu짯la짯ti짯on, Alveo U50 deli짯vers 7x grea짯ter power effi짯ci짯en짯cy com짯pared to GPU-only per짯for짯mance5 for a fas짯ter time to insight, deter짯mi짯ni짯stic laten짯cy and redu짯ced ope짯ra짯tio짯nal costs.

Ever-gro짯wing demands on the data cen짯ter are pushing exis짯ting infra짯struc짯tu짯re to its limit, dri짯ving the need for adap짯ta짯ble solu짯ti짯ons that can opti짯mi짯ze per짯for짯mance across a broad ran짯ge of workloads and extend the life짯cy짯cle of exis짯ting infra짯struc짯tu짯re, ulti짯m짯ate짯ly redu짯cing TCO, said Salil Raje, exe짯cu짯ti짯ve vice pre짯si짯dent and gene짯ral mana짯ger, Data Cen짯ter Group, at Xilinx. 쏷he new Alveo U50 brings an opti짯mi짯zed form fac짯tor and unpre짯ce짯den짯ted per짯for짯mance and adap짯ta짯bi짯li짯ty to data cen짯ter workloads, and we con짯ti짯nue to build out solu짯ti짯on stacks with a gro짯wing eco짯sys짯tem of appli짯ca짯ti짯on part짯ners to deli짯ver pre짯vious짯ly unthinkable capa짯bi짯li짯ties to a ran짯ge of industries.

Indus짯try Support

The forth짯co짯ming 2nd Gen AMD EPYC pro짯ces짯sor is ide짯al짯ly sui짯ted for data cen짯ter-first acce짯le짯ra짯tors like the Alveo U50 that com짯bi짯ne com짯pu짯te, net짯work and sto짯rage acce짯le짯ra짯ti짯on all on the same plat짯form, said Rag짯hu Nam짯bi짯ar, vice pre짯si짯dent & CTO of appli짯ca짯ti짯on engi짯nee짯ring at AMD. 쏷aking advan짯ta짯ge of AMD셲 lea짯der짯ship, first x86 ser짯ver-class PCIe 4.0 CPU, the Alveo U50 will be the industry셲 first adap짯ta짯ble acce짯le짯ra짯tor card with PCIe 4.0 sup짯port. We look for짯ward to working with Xilinx to com짯bi짯ne the bene짯fits of AMD EPYC based solu짯ti짯ons with Alveo acce짯le짯ra짯ti짯on to hypers짯ca짯le and enter짯pri짯se customers.

IBM is exci짯ted about the expan짯si짯on of the Xilinx Alveo port짯fo짯lio with the addi짯ti짯on of the Alveo U50 adap짯ta짯ble acce짯le짯ra짯tor card, said Ste짯ve Fields, Chief Archi짯tect for IBM Power Sys짯tems. 쏻e belie짯ve the com짯bi짯na짯ti짯on of low-pro짯fi짯le form-fac짯tor, HBM2 memo짯ry per짯for짯mance, and PCIe Gen 4 speed to inter짯face with IBM Power pro짯ces짯sors will enable the Open짯POWER eco짯sys짯tem to pro짯vi짯de cut짯ting edge adap짯ta짯ble acce짯le짯ra짯ti짯on solutions. 

With the smal짯ler design and advan짯ced fea짯tures of the Alveo U50, Xilinx is well posi짯tio짯ned to expand the mar짯kets for acce짯le짯ra짯ti짯on with con짯fi짯gura짯ble logic, said Karl Freund, seni짯or ana짯lyst, HPC and deep lear짯ning, Moor Insights & Stra짯tegy. 쏷he new Alveo U50 should allow them to break through the mar짯ket noi짯se with demons짯tra짯ted and dra짯ma짯tic per짯for짯mance advan짯ta짯ges in high-growth use cases.

We are exci짯ted to be col짯la짯bo짯ra짯ting with Xilinx at FMS, show짯ca짯sing the fle짯xi짯bi짯li짯ty and per짯for짯mance of the Alveo U50 and our Open짯Flex com짯posable NVMe-oF plat짯form, said Scott Hamil짯ton, seni짯or direc짯tor of pro짯duct manage짯ment, Data Cen짯ter Sys짯tems busi짯ness unit at Wes짯tern Digi짯tal. 쏼ilinx is lea짯ding the char짯ge in fabric-based com짯pu짯ta짯tio짯nal sto짯rage using NVMe-oF to enable full dis짯ag짯gre짯ga짯ti짯on of ser짯ver resour짯ces. We belie짯ve the new Alveo U50 will be an important part of the eco짯sys짯tem as orga짯niza짯ti짯ons take a tru짯ly dis짯ag짯gre짯ga짯ted approach to SDS infrastructure.

Avai짯la짯bi짯li짯ty: 
The Alveo U50 is sam짯pling now with OEM sys짯tem qua짯li짯fi짯ca짯ti짯ons in pro짯cess. Gene짯ral avai짯la짯bi짯li짯ty is sla짯ted for fall 2019.

Flash Memo짯ry Summit: 
Xilinx will be show짯ca짯sing the Alveo U50 and other pro짯duct demons짯tra짯ti짯ons in booth 313 at Flash Memo짯ry Sum짯mit (FMS) 2019, taking place August 68 at the San짯ta Cla짯ra Con짯ven짯ti짯on Cen짯ter in San짯ta Cla짯ra, Calif. 

Addi짯tio짯nal짯ly, Salil Raje, exe짯cu짯ti짯ve vice pre짯si짯dent and gene짯ral mana짯ger, Data Cen짯ter Group, at Xilinx, will be giving a key짯note titled, 쏤PGAs: The Key to Acce짯le짯ra짯ting High-Speed Sto짯rage Sys짯tems on August 7 at 2:40 p.m. PT in the Mis짯si짯on City Ballroom.

About Xilinx
Xilinx deve짯lo짯ps high짯ly fle짯xi짯ble and adap짯ti짯ve pro짯ces짯sing plat짯forms that enable rapid inno짯va짯ti짯on across a varie짯ty of tech짯no짯lo짯gies from the end짯point to the edge to the cloud. Xilinx is the inven짯tor of the FPGA, hard짯ware pro짯gramma짯ble SoCs, and the ACAP, desi짯gned to deli짯ver the most dyna짯mic pro짯ces짯sor tech짯no짯lo짯gy in the indus짯try and enable the adap짯ta짯ble, intel짯li짯gent and con짯nec짯ted world of the future. For more infor짯ma짯ti짯on, visit www.xilinx.com.

Foot짯no짯tes:

  1. Per짯for짯mance of Alveo U50, with both Alveo U50 and Nvi짯dia Tes짯la T4 run짯ning (B=2, L=8), Tes짯la T4 (B=8, L=8) (esti짯ma짯ted data)
  2. Alveo U50=24ms, 150k query/hr / CPU Query time = 210ms, 34k query/hr. based on Intel Xeon Pla짯ti짯num 8260 Pro짯ces짯sor (35.75M Cache, 2.40 GHz) 24 core
  3. Intel Sky짯la짯ke-SP 6152 @2.10GHz CPU (Ubun짯tu 16.04) CPU Query time = 210ms, 34k query/hr. Alveo U50=24ms, 150k query/hr Xilinx Alveo U50 SDAc짯cel 2018.3 (esti짯ma짯te) GB/s com짯pres짯si짯on per CPU core = .0229. Alveo U50 = 10GB/s (esti짯ma짯te)
  4. Alveo U50 laten짯cy is <0.5us, CPU laten짯cy is 10us. Mea짯su짯red from start of packet in on Tick (Mar짯ket Data) to start of packet out on the order to Start Packet Out on the Order (esti짯ma짯te)
  5. Intel Xeon E5-2697 v4 GCC 5.4.0 Nvi짯dia Tes짯la V100 16GB PCIe CUDA 10.1 / GCC 5.4.0 Intel Sky짯la짯ke-SP 6152 @2.10GHz CPU (Ubun짯tu 16.04) CPU Query time = 210ms, 34k query/hr. Alveo U50=24ms, 150k query/hr Xilinx Alveo U50 SDAc짯cel 2018.3 (esti짯ma짯ted data).

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