Changes in Intel’s Technology, Systems Architecture and Client Group

Jim Keller to Depart Intel; New Leaders Named

SANTA CLARA, Calif., June 11, 2020 ‚Äď Today, Intel announ¬≠ced that Jim Kel¬≠ler has resi¬≠gned effec¬≠ti¬≠ve June 11, 2020, due to per¬≠so¬≠nal reasons. Intel app¬≠re¬≠cia¬≠tes Mr. Keller‚Äôs work over the past two years hel¬≠ping them con¬≠ti¬≠nue advan¬≠cing Intel‚Äôs pro¬≠duct lea¬≠der¬≠ship and they wish him and his fami¬≠ly all the best for the future. Intel is plea¬≠sed to announ¬≠ce, howe¬≠ver, that Mr. Kel¬≠ler has agreed to ser¬≠ve as a con¬≠sul¬≠tant for six months to assist with the transition.

Intel has a vast¬≠ly expe¬≠ri¬≠en¬≠ced team of tech¬≠ni¬≠cal lea¬≠ders within its Tech¬≠no¬≠lo¬≠gy, Sys¬≠tems Archi¬≠tec¬≠tu¬≠re and Cli¬≠ent Group (TSCG) under the lea¬≠der¬≠ship of Dr. Ven¬≠ka¬≠ta (Mur¬≠thy) Ren¬≠duch¬≠in¬≠ta¬≠la, group pre¬≠si¬≠dent of TSCG and chief engi¬≠nee¬≠ring offi¬≠cer. As part of this tran¬≠si¬≠ti¬≠on, the fol¬≠lo¬≠wing lea¬≠der¬≠ship chan¬≠ges will be made, effec¬≠ti¬≠ve immediately:

  • Sun¬≠da¬≠ri Mitra, the for¬≠mer CEO and foun¬≠der of Net¬≠Speed Sys¬≠tems and the cur¬≠rent lea¬≠der of Intel‚Äôs Con¬≠fi¬≠gura¬≠ble Intellec¬≠tu¬≠al Pro¬≠per¬≠ty and Chas¬≠sis Group, will lead a new¬≠ly crea¬≠ted IP Engi¬≠nee¬≠ring Group focu¬≠sed on deve¬≠lo¬≠ping best-in-class IP.
  • Gene Scu¬≠te¬≠ri, an accom¬≠plished engi¬≠nee¬≠ring lea¬≠der in the semi¬≠con¬≠duc¬≠tor indus¬≠try, will head the Xeon and Net¬≠wor¬≠king Engi¬≠nee¬≠ring Group.
  • Daa¬≠man Hej¬≠ma¬≠di will return to lea¬≠ding the Cli¬≠ent Engi¬≠nee¬≠ring Group focu¬≠sed on sys¬≠tem-on-chip (SoC) exe¬≠cu¬≠ti¬≠on and desig¬≠ning next-gene¬≠ra¬≠ti¬≠on cli¬≠ent, device and chip¬≠set pro¬≠ducts. Hej¬≠ma¬≠di has over two deca¬≠des of expe¬≠ri¬≠ence lea¬≠ding teams deli¬≠ve¬≠ring advan¬≠ced SoCs both insi¬≠de and out¬≠side of Intel.
  • Navid Shah¬≠ria¬≠ri, an expe¬≠ri¬≠en¬≠ced Intel lea¬≠der, will con¬≠ti¬≠nue to lead the Manu¬≠fac¬≠tu¬≠ring and Pro¬≠duct Engi¬≠nee¬≠ring Group, which is focu¬≠sed on deli¬≠ve¬≠ring com¬≠pre¬≠hen¬≠si¬≠ve pre-pro¬≠duc¬≠tion test sui¬≠tes and com¬≠po¬≠nent debug capa¬≠bi¬≠li¬≠ties to enable high-qua¬≠li¬≠ty, high-volu¬≠me manufacturing.

Intel con¬≠gra¬≠tu¬≠la¬≠tes Sun¬≠da¬≠ri, Gene, Daa¬≠man and Navid as we begin the next pha¬≠se of our world-class engi¬≠nee¬≠ring orga¬≠niza¬≠ti¬≠on and look for¬≠ward to exe¬≠cu¬≠ting on our exci¬≠ting road¬≠map of products.