Xilinx Launches Alveo U55C, Its Most Powerful Accelerator Card Ever, Purpose-Built for HPC and Big Data Workloads

Breakthrough HPC clustering solution and simplified programmability enable massive scale-out of cutting-edge compute across existing customer infrastructure and network

ST. LOUIS(BUSINESS WIRE)SC21  Xilinx, Inc. (NASDAQ: XLNX), the lea짯der in adap짯ti짯ve com짯pu짯ting, today at the SC21 super짯com짯pu짯ting con짯fe짯rence intro짯du짯ced the Alveo꽓 U55C data cen짯ter acce짯le짯ra짯tor card and a new stan짯dards-based, API-dri짯ven clus짯te짯ring solu짯ti짯on for deploy짯ing FPGAs at mas짯si짯ve sca짯le. The Alveo U55C acce짯le짯ra짯tor brings supe짯ri짯or per짯for짯mance-per-watt to high per짯for짯mance com짯pu짯ting (HPC) and data짯ba짯se workloads and easi짯ly sca짯les through the Xilinx HPC clus짯te짯ring solution.

Pur짯po짯se-built for HPC and big data workloads, the new Alveo U55C card is the company셲 most powerful Alveo acce짯le짯ra짯tor card ever, offe짯ring the hig짯hest com짯pu짯te den짯si짯ty and HBM capa짯ci짯ty in the Alveo acce짯le짯ra짯tor port짯fo짯lio. Tog짯e짯ther with the new Xilinx RoCE v2-based clus짯te짯ring solu짯ti짯on, a broad spec짯trum of cus짯to짯mers with lar짯ge-sca짯le com짯pu짯te workloads can now imple짯ment powerful FPGA-based HPC clus짯te짯ring using their exis짯ting data cen짯ter infra짯struc짯tu짯re and network.

Sca짯ling out Alveo com짯pu짯te capa짯bi짯li짯ties to tar짯get HPC workloads is now easier, more effi짯ci짯ent and more powerful than ever, said Salil Raje, exe짯cu짯ti짯ve vice pre짯si짯dent and gene짯ral mana짯ger, Data Cen짯ter Group at Xilinx. 쏛rchi짯tec짯tu짯ral짯ly, FPGA-based acce짯le짯ra짯tors like Alveo cards pro짯vi짯de the hig짯hest per짯for짯mance at the lowest cost for many com짯pu짯te-inten짯si짯ve workloads. By intro짯du짯cing a stan짯dards-based metho짯do짯lo짯gy that enables the crea짯ti짯on of Alveo HPC clus짯ters using a customer셲 exis짯ting infra짯struc짯tu짯re and net짯work, we셱e deli짯ve짯ring tho짯se key advan짯ta짯ges at mas짯si짯ve sca짯le to any data cen짯ter. This is a major leap for짯ward for even broa짯der adop짯ti짯on of Alveo and adap짯ti짯ve com짯pu짯ting throug짯hout the data center.

Built for HPC and big data applications

The Alveo U55C card com짯bi짯nes many key fea짯tures that today셲 HPC workloads requi짯re. It deli짯vers more par짯al짯le짯lism of data pipe짯lines, supe짯ri짯or memo짯ry manage짯ment, opti짯mi짯zed data move짯ment throug짯hout the pipe짯line, and the hig짯hest per짯for짯mance-per-watt in the Alveo port짯fo짯lio. The Alveo U55C card is a sin짯gle-slot full height, half length (FHHL) form fac짯tor with a low 150W max power. It offers supe짯ri짯or com짯pu짯te den짯si짯ty and dou짯bles the HBM2 to 16GB com짯pared to its pre짯de짯ces짯sor, the dual-slot Alveo U280 card. The U55C pro짯vi짯des more com짯pu짯te in a smal짯ler form fac짯tor for crea짯ting den짯se Alveo acce짯le짯ra짯tor-based clus짯ters. It셲 built for high-den짯si짯ty strea짯ming data, high IO math, and big com짯pu짯te pro짯blems that requi짯re sca짯le-out like big data ana짯ly짯tics and AI applications.

Lever짯aging RoCE v2 and data cen짯ter bridging, cou짯pled with 200 Gbps band짯width, the API-dri짯ven clus짯te짯ring solu짯ti짯on enables an Alveo net짯work that com짯pe짯tes with Infi짯ni짯Band net짯works in per짯for짯mance and laten짯cy, with no ven짯dor lock-in. MPI inte짯gra짯ti짯on allows for HPC deve짯lo짯pers to sca짯le out Alveo data pipe짯lining from the Xilinx Vitis꽓 uni짯fied soft짯ware plat짯form. Uti짯li짯zing exis짯ting open stan짯dards and frame짯works, it셲 now pos짯si짯ble to sca짯le out across hundreds of Alveo cards regard짯less of the ser짯ver plat짯forms and net짯work infra짯struc짯tu짯re and with shared workloads and memory.

Soft짯ware deve짯lo짯pers and data sci짯en짯tists can unlock the bene짯fits of Alveo and adap짯ti짯ve com짯pu짯ting through high-level pro짯gramma짯bi짯li짯ty of both the appli짯ca짯ti짯on and clus짯ter uti짯li짯zing the Vitis platform. Xilinx has inves짯ted hea짯vi짯ly in the Vitis deve짯lo짯p짯ment plat짯form and tools flow to make adap짯ti짯ve com짯pu짯ting more acces짯si짯ble to soft짯ware deve짯lo짯pers and data sci짯en짯tists wit짯hout hard짯ware exper짯ti짯se. The major AI frame짯works like Pytorch and Ten짯sor짯flow are sup짯port짯ed, as well as high-level pro짯gramming lan짯guages like C, C++ and Python, allo짯wing deve짯lo짯pers to build domain solu짯ti짯ons using spe짯ci짯fic APIs and libra짯ri짯es, or uti짯li짯ze Xilinx soft짯ware deve짯lo짯p짯ment kits, to easi짯ly acce짯le짯ra짯te key HPC workloads within an exis짯ting data center.

HPC cus짯to짯mer use cases

CSIRO, Australia셲 natio짯nal rese짯arch orga짯niza짯ti짯on along with the world셲 lar짯gest radio astro짯no짯my anten짯na array, is uti짯li짯zing Alveo U55C cards for signal pro짯ces짯sing in the Squa짯re Kilo짯me짯ter Array radio telescope. Deploy짯ing the Alveo cards as net짯work-atta짯ched acce짯le짯ra짯tors with HBM allows for mas짯si짯ve through짯put at sca짯le across the HPC signal pro짯ces짯sing clus짯ter. The Alveo acce짯le짯ra짯tor-based clus짯ter allows CSIRO to tack짯le the mas짯si짯ve com짯pu짯te task of aggre짯ga짯ting, fil짯te짯ring, pre짯pa짯ring and pro짯ces짯sing data from 131,000 anten짯nas in real time. The 460Gbps of HBM2 band짯width across the signal pro짯ces짯sing clus짯ter is ser짯ved by 420 Alveo U55C cards ful짯ly net짯work짯ed tog짯e짯ther across P4-enab짯led 100Gbps swit짯ches. The Alveo U55C clus짯ter deli짯vers pro짯ces짯sing per짯for짯mance with over짯all through짯put at 15Tb/s in a com짯pact power and cost effi짯ci짯ent foot짯print. CSIRO is now com짯ple짯ting an exam짯p짯le Alveo refe짯rence design in order to help other radio astro짯no짯my or adja짯cent indus짯tries achie짯ve the same success.

Ansys LS-DYNA crash simu짯la짯ti짯on soft짯ware is used by near짯ly every auto짯mo짯ti짯ve com짯pa짯ny in the world. The design of safe짯ty and struc짯tu짯ral sys짯tems hin짯ges on the per짯for짯mance of models as they miti짯ga짯te the cos짯ts of phy짯si짯cal crash test짯ing with com짯pu짯ter-aided design fini짯te ele짯ment method (FEM) simu짯la짯ti짯ons. FEM sol짯vers are the pri짯ma짯ry algo짯rith짯ms dri짯ving simu짯la짯ti짯ons with hundreds of mil짯li짯ons of degrees of free짯dom, the짯se enorm짯ous algo짯rith짯ms can be bro짯ken out into more rudi짯men짯ta짯ry sol짯vers like PCG, spar짯se matri짯ces and ICCG. By sca짯ling out across many Alveo cards with hyper짯par짯al짯lel data pipe짯lining, LS-DYNA can acce짯le짯ra짯te per짯for짯mance by more than 5X in com짯pa짯ri짯son to x86 CPUs. This results in more work per clock cycle in an Alveo pipe짯line with LS-DYNA cus짯to짯mers bene짯fiting from game chan짯ging simu짯la짯ti짯on times.

In the spi짯rit of relent짯less inno짯va짯ti짯on, we셱e exci짯ted about col짯la짯bo짯ra짯ting with Xilinx to signi짯fi짯cant짯ly acce짯le짯ra짯te the fini짯te-ele짯ment sol짯vers, which can repre짯sent 90% of the com짯pu짯te workload for impli짯cit mecha짯nics, in our LS-DYNA simu짯la짯ti짯on appli짯ca짯ti짯on, said Wim Slag짯ter, stra짯te짯gic part짯ner짯ships direc짯tor at Ansys. 쏻e look for짯ward to Xilinx acce짯le짯ra짯ti짯on hel짯ping us in our mis짯si짯on to sup짯port inno짯va짯tors in engi짯nee짯ring what셲 ahead.

Tiger짯Graph, pro짯vi짯der of a lea짯ding graph ana짯ly짯tics plat짯form, is using mul짯ti짯ple Alveo U55C cards to clus짯ter and acce짯le짯ra짯te the two most pro짯li짯fic algo짯rith짯ms that dri짯ve graph-based recom짯men짯da짯ti짯on and clus짯te짯ring engi짯nes. Graph data짯ba짯ses are a dis짯rup짯ti짯ve plat짯form for data sci짯en짯tists. Graphs take data from silos and bring focus to the rela짯ti짯onships bet짯ween data. The next fron짯tier for graph is fin짯ding tho짯se ans짯wers in real time. Alveo U55C acce짯le짯ra짯tes the query times and pre짯dic짯tions for recom짯men짯da짯ti짯on engi짯nes from minu짯tes down to mil짯li짯se짯conds. By uti짯li짯zing mul짯ti짯ple U55C cards to sca짯le up ana짯ly짯tics, the supe짯ri짯or com짯pu짯ta짯tio짯nal power and memo짯ry band짯width acce짯le짯ra짯tes graph query speeds up to 45X fas짯ter com짯pared to CPU-based clus짯ters. The qua짯li짯ty of scores also increa짯ses by up to 35%, resul짯ting in grea짯ter con짯fi짯dence dra짯ma짯ti짯cal짯ly lowe짯ring fal짯se posi짯ti짯ves to low sin짯gle digits.

Pro짯duct avai짯la짯bi짯li짯ty and easy evaluations

The Alveo U55C card is curr짯ent짯ly available on Xilinx.com and through Xilinx aut짯ho짯ri짯zed dis짯tri짯bu짯tors. It셲 also available for easy eva짯lua짯ti짯on via public cloud-based FPGA-as-a-Ser짯vice pro짯vi짯ders, as well as sel짯ect colo짯ca짯ti짯on data cen짯ters for pri짯va짯te pre짯views. Clus짯te짯ring is available now for pri짯va짯te pre짯views, with gene짯ral avai짯la짯bi짯li짯ty expec짯ted in the second quar짯ter of next year.

Xilinx is show짯ca짯sing the Alveo U55C acce짯le짯ra짯tor card, along with part짯ner solu짯ti짯ons, at the SC21 con짯fe짯rence taking place this week. Regis짯ter at SC21 to visit the Xilinx vir짯tu짯al booth.

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About Xilinx

Xilinx, Inc. deve짯lo짯ps high짯ly fle짯xi짯ble and adap짯ti짯ve pro짯ces짯sing plat짯forms that enable rapid inno짯va짯ti짯on across a varie짯ty of tech짯no짯lo짯gies from the cloud, to the edge, to the end짯point. Xilinx is the inven짯tor of the FPGA and Adap짯ti짯ve SoCs (inclu짯ding our Adap짯ti짯ve Com짯pu짯te Acce짯le짯ra짯ti짯on Plat짯form, or ACAP), desi짯gned to deli짯ver the most dyna짯mic com짯pu짯ting tech짯no짯lo짯gy in the indus짯try. We col짯la짯bo짯ra짯te with our cus짯to짯mers to crea짯te sca짯lable, dif짯fe짯ren짯tia짯ted and intel짯li짯gent solu짯ti짯ons that enable the adap짯ta짯ble, intel짯li짯gent and con짯nec짯ted world of the future. For more infor짯ma짯ti짯on, visit xilinx.com.