Hous­ton, Texas, United Sta­tes (March 24, 2022) – Octa­vo Sys­tems, the lea­der in mass mar­ket Sys­tem-in-Packa­ge (SiP) solu­ti­ons, today announ­ced a new fami­ly of SiP devices based on the AMD Xilinx® Zynq® UltraS­ca­le+™ MPSoC Archi­tec­tu­re. The OSDZU3, based on the ZU3, pro­vi­des the bene­fits of Sys­tem-in-Packa­ge while deli­ve­ring the per­for­mance and fle­xi­bi­li­ty expec­ted from the Zynq UltraS­ca­le+ architecture.

The OSDZU3 lever­a­ges Inte­gra­ted Cir­cuit manu­fac­tu­ring tech­no­lo­gy to integrate:

AMD-Xilinx Zynq UltraS­ca­le+ MPSoC ZU3 A Com­ple­te and Fle­xi­ble Power System LPDDR4 EEPROM QSPI MEMS Oscil­la­tors Over one hundred passives All into a sin­gle 20.5mm x 40mm BGA

The OSDZU3 is about 60% smal­ler than an equi­va­lent sys­tem design with dis­crete com­pon­ents. “The inte­gra­ti­on not only makes the OSDZU3 per­fect for any­bo­dy con­cer­ned about the Size, Weight, and Power (SWaP) of their pro­duct, it is also ide­al for any­bo­dy loo­king to move quick­ly through their design,” says Greg Sher­i­dan, VP Stra­tegy and Mar­ke­ting at Octa­vo Sys­tems. “Remo­ving the need to design com­pli­ca­ted power sys­tems or DDR has saved our cus­to­mers upwards of 9 months of design.”

The OSDZU3 pro­vi­des access to all the inter­faces and fea­tures on the ZU3. The 1mm pitch 600 pin ball map pro­vi­des access to every I/O on the ZU3 in just 2 PCB lay­ers using low-cost design rules. The power sys­tem also allows the desi­gner to levera­ge all the power modes the ZU3 supports.

“Sys­tem-level solu­ti­ons are incre­asing­ly important to our cus­to­mers, as they seek to deploy cut­ting-edge embedded com­pu­ting and machi­ne lear­ning capa­bi­li­ties within incre­asing­ly com­pres­sed deve­lo­p­ment time­frames,” said Han­ne­ke Kre­kels, vice pre­si­dent of Core Ver­ti­cal Mar­kets, Adap­ti­ve & Embedded Com­pu­ting Group, AMD. “In-line with the­se objec­ti­ves, we have work­ed clo­se­ly with Octa­vo Sys­tems to bring the first Sys­tem-in-Packa­ge solu­ti­on based on the powerful Zynq UltraS­ca­le+ MPSoC. This offe­ring enables our users to acce­le­ra­te inno­va­ti­on and sim­pli­fy sys­tem design for the most size cons­trai­ned applications.”

The OSDZU3 is com­pa­ti­ble with the AMD-Xilinx deve­lo­p­ment tools, Xilinx Viv­a­do Design Suite and Xilinx Vitis uni­fied soft­ware plat­form. Octa­vo Sys­tems work­ed clo­se­ly with Design­Linx, an AMD-Xilinx Pre­mier Design Ser­vice Part­ner, to deve­lop the base soft­ware plat­form nee­ded to ensu­re the SiP inte­gra­tes into the stan­dard AMD-Xilinx tool flow. “Lever­aging our deep know­ledge of FPGA and Embedded Soft­ware design, we work­ed with Octa­vo to ensu­re the OSDZU3 works seam­less­ly in the stan­dard AMD-Xilinx deve­lo­p­ment flows. This enables users to take advan­ta­ge of the SiP in an envi­ron­ment they are com­for­ta­ble with. This expe­ri­ence allows us to acce­le­ra­te our mutu­al customer’s pro­grams using the OSDZU3 SiP,” says Bri­an Mul­hearn, Direc­tor of Embedded Solu­ti­ons, DesignLinx.

Accom­pany­ing the OSDZU3 Sys­tem-in-Packa­ge, Octa­vo Sys­tems will be releasing the OSDZU3-REF refe­rence plat­form. It fea­tures popu­lar inter­faces like USB‑C, USB 3.0, SATA Host, 1Gb Ether­net, and an FMC LP Con­nec­tor. It also sup­ports dis­plays through Dis­play Port and a LVDS touch dis­play con­nec­tor. It will ship with a Peta­Li­nux Dis­tri­bu­ti­on and demos that are also deve­lo­ped by DesignLinx.

Octa­vo Sys­tems has also fran­chised Avnet as a glo­bal dis­tri­bu­tor to sup­port the roll out and adop­ti­on of the new OSDZU3 System-in-Package.

Availability

Octa­vo Sys­tems has Engi­nee­ring Samples available today through their Beta Pro­gram. Design engi­neers who are inte­res­ted in gai­ning access to the Beta pro­gram can cont­act their local Avnet, Octa­vo Sys­tems, or AMD-Xilinx sales representative.

The refe­rence plat­form will be available to the gene­ral mar­ket in Q3 CY2022 and the OSDZU3 will be in pro­duc­tion by the end of CY2022.