Schlagwort: Synopsys

Synopsys Accelerates Multi-Die Designs with Industry셲 First Complete HBM3 IP and Verification Solutions

HBM3 IP Solu짯ti짯on Deli짯vers Maxi짯mum Memo짯ry Band짯width of 921 GB/s for High-Per짯for짯mance Com짯pu짯ting, AI, and Gra짯phics SoCs

MOUNTAIN VIEW, Calif.Oct. 7, 2021 /PRNews짯wire/

High짯lights of this Announcement:

  • The Design짯Wa짯re HBM3 Con짯trol짯ler, PHY, and Veri짯fi짯ca짯ti짯on IP redu짯ces inte짯gra짯ti짯on risk and maxi짯mi짯zes memo짯ry per짯for짯mance in 2.5D mul짯ti-die systems
  • Low-laten짯cy HBM3 Con짯trol짯ler with fle짯xi짯ble con짯fi짯gu짯ra짯ti짯on opti짯ons enhan짯ce memo짯ry bandwidth
  • Pre-har짯den짯ed or con짯fi짯gura짯ble HBM3 PHY in 5몁m pro짯cess ope짯ra짯tes at 7200 Mbps for up to 2X the data rate and impro짯ves power effi짯ci짯en짯cy by up to 60% com짯pared to HBM2E
  • Veri짯fi짯ca짯ti짯on IP and memo짯ry models for ZeBu and HAPS offer an end-to-end solu짯ti짯on for rapid veri짯fi짯ca짯ti짯on clo짯sure from IP to SoC
  • Syn짯op짯sys 3DIC Com짯pi짯ler, an inte짯gra짯ted mul짯ti-die design and ana짯ly짯sis plat짯form, pro짯vi짯des a com짯pre짯hen짯si짯ve HBM3 auto-rou짯ting solu짯ti짯on for rapid and robust design development

Syn짯op짯sys, Inc. (Nasdaq: SNPS) today announ짯ced the industry셲 first com짯ple짯te HBM3 IP solu짯ti짯on, inclu짯ding con짯trol짯ler, PHY, and veri짯fi짯ca짯ti짯on IP for 2.5D mul짯ti-die packa짯ge sys짯tems. HBM3 tech짯no짯lo짯gy helps desi짯gners meet essen짯ti짯al high-band짯width and low-power memo짯ry requi짯re짯ments for sys짯tem-on-chip (SoC) designs tar짯ge짯ting high-per짯for짯mance com짯pu짯ting, AI and gra짯phics appli짯ca짯ti짯ons. Syn짯op짯sys Design짯Wa짯re짰 HBM3 Con짯trol짯ler and PHY IP, built on sili짯con-pro짯ven HBM2E IP, levera짯ge Syn짯op짯sys inter짯po짯ser exper짯ti짯se to pro짯vi짯de a low-risk solu짯ti짯on that enables high memo짯ry band짯width at up to 921 GB/s.
() Wei짯ter짯le짯sen 쨩

Synopsys and TSMC Accelerate 2.5D/3DIC Designs with CoWoS멣 and Integrated Fan-Out Certified Design Flows

MOUNTAIN VIEW, Calif., Aug. 25, 2020  Syn짯op짯sys, Inc. announ짯ced that Syn짯op짯sys and TSMC have col짯la짯bo짯ra짯ted to deli짯ver cer짯ti짯fied design flows for advan짯ced pack짯a짯ging solu짯ti짯ons using the Syn짯op짯sys 3DIC Com짯pi짯ler pro짯duct for both sili짯con inter짯po짯ser based Chip-on-Wafer-on-Sub짯stra짯te (CoWoS멣) and high-den짯si짯ty wafer-level RDL-based Inte짯gra짯ted Fan-Out (InFO멢) designs. 3DIC Com짯pi짯ler pro짯vi짯des pack짯a짯ging design solu짯ti짯ons requi짯red by today셲 com짯plex mul짯ti-die sys짯tems for appli짯ca짯ti짯ons like high-per짯for짯mance com짯pu짯ting (HPC), auto짯mo짯ti짯ve and mobile.

Appli짯ca짯ti짯ons such as AI and 5G net짯wor짯king incre짯asing짯ly requi짯re hig짯her levels of inte짯gra짯ti짯on, lower power con짯sump짯ti짯on, smal짯ler form fac짯tors, and fas짯ter time to pro짯duc짯tion, and this is dri짯ving the demand for advan짯ced-pack짯a짯ging tech짯no짯lo짯gies, said Suk Lee, seni짯or direc짯tor of the Design Infra짯struc짯tu짯re Manage짯ment Divi짯si짯on at TSMC. TSMC셲 Inno짯va짯ti짯ve 3DIC tech짯no짯lo짯gies such as CoWoS and InFO enable cus짯to짯mer inno짯va짯ti짯on with grea짯ter func짯tion짯a짯li짯ty and enhan짯ced sys짯tem per짯for짯mance at incre짯asing짯ly com짯pe짯ti짯ti짯ve cos짯ts. Our col짯la짯bo짯ra짯ti짯on with Syn짯op짯sys pro짯vi짯des cus짯to짯mers with a cer짯ti짯fied solu짯ti짯on for desig짯ning with TSMC셲 CoWoS and InFO pack짯a짯ging tech짯no짯lo짯gies to enable high pro짯duc짯ti짯vi짯ty and fas짯ter time to func짯tion짯al sili짯con. () Wei짯ter짯le짯sen 쨩

GLOBALFOUNDRIES Partners with Synopsys, Mentor, and Keysight on Interoperable Process Design Kit (iPDK) Support for 22FDX

Open짯Ac짯cess-based iPDK pro짯vi짯des a choice of design suite tools for deve짯lo짯pers working on GF셲 best-in-class 22FDX plat짯form San짯ta Cla짯ra, Calif., July 21, 2020  GLOBALFOUNDRIES짰 (GF짰) today announ짯ced the release and dis짯tri짯bu짯ti짯on of Open짯Ac짯cess iPDK libra짯ri짯es opti짯mi짯zed for its 22FDX짰 (22nm FD-SOI) plat짯form. With its best-in-class per짯for짯mance, power con짯sump짯ti짯on, and broad fea짯ture inte짯gra짯ti짯on capa짯bi짯li짯ty, GF셲 dif짯fe짯ren짯tia짯ted 22FDX () Wei짯ter짯le짯sen 쨩

Synopsys Delivers Silicon-Proven HBM2E PHY IP Operating at 3.2 Gbps

Design짯Wa짯re HBM2E PHY IP in TSMCN7 Pro짯cess Deli짯vers High Through짯put for Advan짯ced Gra짯phics, High-Per짯짯for짯짯mance Com짯pu짯ting and Net짯wor짯king SoCs   MOUNTAIN VIEW, Calif., Feb. 25, 2020 /PRNews짯wire/ High짯lights: Syn짯op짯sys Design짯Wa짯re HBM2E IP in TSMCN7 pro짯cess pro짯vi짯des up to 409 GBps aggre짯ga짯te memo짯ry band짯width with low-power con짯sump짯ti짯on and laten짯cy The HBM2E PHY has been veri짯fied using TSMC셲 CoWoS짰 tech짯no짯lo짯gy () Wei짯ter짯le짯sen 쨩

Synopsys Fusion Compiler Adopted by AMD

Syn짯op짯sys and AMD Col짯la짯bo짯ra짯te to Opti짯mi짯ze Syn짯op짯sys Fusi짯on Com짯pi짯ler for Ser짯vers Powered by AMD EPYC Pro짯ces짯sors   MOUNTAIN VIEW, Calif., Feb. 19, 2020 High짯lights: AMD deploys Syn짯op짯sys Fusi짯on Com짯pi짯ler RTL-to-GDSII pro짯duct for the deve짯lo짯p짯ment of its next-gene짯ra짯짯ti짯on pro짯ces짯sor pro짯ducts Uni짯que, sin짯g짯le-data-model archi짯tec짯tu짯re and uni짯fied, full-flow opti짯miza짯ti짯on engi짯nes deli짯ver supe짯ri짯or per짯for짯mance, power and area metrics Syn짯op짯sys, Inc. (Nasdaq: SNPS) today announ짯ced () Wei짯ter짯le짯sen 쨩